HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 593

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
15.3.3
ADCR for each module controls A/D conversion started by an external trigger signal and selects
the operating clock.
Bit
7
6
5
4
3
Bit Name
TRGE
CKS1
CKS0
ADST
ADCS
A/D Control Register_0, 1 (ADCR_0, ADCR_1)
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Trigger Enable
Enables or disables triggering of A/D conversion by
ADTRG or an MTU trigger.
0: A/D conversion triggering is disabled
1: A/D conversion triggering is enabled
Clock Select 1, 0
Select the A/D conversion time.
00: Pφ/32
01: Pφ/16
10: Pφ/8
11: Pφ/4
When changing the operating mode, first clear the
ADST bit in the A/D control registers (ADCR) to 0.
CKS[1,0] = b'11 can be set while Pφ ≤ 25 MHz.
A/D Start
Starts or stops A/D conversion. When this bit is set to
1, A/D conversion is started. When this bit is cleared
to 0, A/D conversion is stopped and the A/D
converter enters the idle state. In single or single-
cycle scan mode, this bit is automatically cleared to 0
when A/D conversion ends on the selected single
channel. In continuous scan mode, A/D conversion is
continuously performed for the selected channels in
sequence until this bit is cleared by a software, reset,
or in software standby mode, or module standby
mode.
A/D Continuous Scan
Selects either single-cycle scan or continuous scan in
scan mode. This bit is valid only when scan mode is
selected.
0: Single-cycle scan
1: Continuous scan
When changing the operating mode, first clear the
ADST bit in the A/D control registers (ADCR) to 0.
Rev.4.00 Mar. 27, 2008 Page 547 of 882
15. A/D Converter
REJ09B0108-0400

Related parts for HD6417144F50V