HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 580

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

14. I
Rev.4.00 Mar. 27, 2008 Page 534 of 882
REJ09B0108-0400
Figure 14.30 Flowchart and Timing of the Execution of the Instruction that Sets the Start
2
C Bus Interface (IIC) Option
SCL
SDA
IRIC
Write 1 to BBSY and
transmission to ICDR
Clear IRIC in ICCR
0 to SCP of ICSR
Read the SCL pin
Write the data for
Set the start
condition?
Yes
SCL=Low?
Yes
Yes
[1] Tasting of IRIC
IRIC = 1?
IRIC=1?
ACK
Yes
No
No
No
No
[2] Testing of SCL=Low
Other processing
Condition for Re-Transmission
[1] Wait for completion of one-byte transfer.
[2] Decide whether or not SCL is low.
[3] Execuse the instruction that sets the start
[4] Confirm the start condition generation
[5] Set the data for transmission (slave address+R/W)
Note: Program so that steps 3 to 5 above are
condition for re-transmission.
[3] Start condition instruction
executed continuously.
issuance (re-transmission)
Start condition (re-transmission)
[4] Testing of IRIC
[5] Write to ICDR (transfer data)
bit7