HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 552

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

14. I
Rev.4.00 Mar. 27, 2008 Page 506 of 882
REJ09B0108-0400
2
C Bus Interface (IIC) Option
Figure 14.14 Example: Flowchart of Operations in Master Receive Mode
Clear the IRIC flag in ICCR
Clear the IRIC flag in ICCR
Read the IRIC flag in ICCR
Clear the IRIC flag in ICCR
Read the IRIC flag in ICCR
No
No
Write 0 to BBSY and SCP
Set HNDS = 0 (SCRX)
Set ACKB = 0 (ICSR)
Set WAIT = 1 (ICMR)
Set ACKB = 1 (ICSR)
Set WAIT = 0 (ICMR)
Master receive mode
Set TRS = 0 (ICCR)
Set TRS = 1 (ICCR)
Read ICDR
Read ICDR
IRIC = 1?
IRIC = 1?
(ICCR)
End
Yes
Yes
(One Byte Reception) (WAIT = 1)
[1] Set receive mode.
[2] Start receiving. Dummy read.
[3] Wait for a receive wait
[7] Set acknowledge data for the final reception.
[9] Set TRS for stop condition issuance.
[11] Clear the IRIC flag (to cancel wait).
[12] Wait for 1 byte to be received
[15] Cancel wait mode. Clear the IRIC flag.
[16] Read the final receive data.
[17] Issue stop condition
(set IRIC at the falling edge of the 8th cycle).
(set IRIC at the rising edge of the 9th cycle).
(IRIC should be cleared to 0 after setting WAIT = 0)