MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 137

• Manufacturer Part Number: MC68HC912B32CFU8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC68HC912B32CFU8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

11.2.13 PWM Special Mode Register
Read: Anytime
Write: Only in special mode (SMODN = 0)
These bits are available only in special mode and are reset in normal mode.
DISCR — Disable Channel Counter Reset Bit
DISCP — Disable Compare Count Period Bit
DISCAL — Disable Scale Counter Loading Bit
11.2.14 Port P Data Register
Read: Anytime
Write: Anytime
PWM functions share port P pins 3 to 0 and take precedence over the general-purpose port when
enabled. When configured as input, a read returns the pin level. When configured as output, a read
returns the latched output data.
A write drives associated pins only if configured for output and the corresponding PWM channel is not
enabled. After reset, all pins are general-purpose, high-impedance inputs.
Freescale Semiconductor
This bit disables the normal operation of resetting the channel counter when the channel counter is
written.
This bit disables the normal operation of loading scale counters on a write to the associated scale
register.
0 = Normal operation
1 = Write to PWM channel counter does not reset channel counter.
0 = Normal operation
1 = In left-aligned output mode, match of the period does not reset the associated PWM counter
0 = Normal operation
1 = Write to PWSCAL0 and PWSCAL1 does not load scale counters.
register.
Address: $0055
Address: $0056
Reset:
Reset:
Read:
Read:
Write:
Write:
PWM
DISCR
Bit 7
Bit 7
PP7
Figure 11-25. PWM Special Mode Register (PWTST)
0
Figure 11-26. Port P Data Register (PORTP)
DISCP
= Unimplemented
PP6
6
0
6
M68HC12B Family Data Sheet, Rev. 9.1
DISCAL
PP5
5
0
5
Unaffected by reset
PP4
4
0
0
4
PWM3
PP3
3
0
0
3
PWM2
PP2
2
0
0
2
PWM1
PP1
1
0
0
1
PWM Register Descriptions
PWM0
Bit 0
Bit 0
PP0
0
0
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