MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 154

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MC68HC912B32CFU8

Manufacturer Part Number
MC68HC912B32CFU8
Description
IC MCU 32K FLASH 8MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC68HC912B32CFU8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
63
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
768 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Manufacturer
Quantity
Price
Part Number:
MC68HC912B32CFU8
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC912B32CFU8
Manufacturer:
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Quantity:
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Standard Timer (TIM)
12.3.13 Timer Test Register
Read: Anytime
Write: Only in special mode (SMODN = 0)
TCBYP — Timer Divider Chain Bypass Bit
PCBYP — Pulse Accumulator Divider Chain Bypass Bit
12.3.14 Timer Port Data Register
Read: Anytime; inputs return pin level; outputs return pin driver input level
Write: Data stored in an internal latch; drives pins only if configured for output
154
0 = Normal operation
1 = 16-bit free-running timer counter is divided into two 8-bit halves and the prescaler is bypassed.
0 = Normal operation
1 = 16-bit pulse accumulator counter is divided into two 8-bit halves and the prescaler is bypassed.
The clock drives both halves directly.
The clock drives both halves directly.
Address: $00AD
Address: $00AE
Writes do not change pin state when the pin is configured for timer output.
The minimum pulse width for pulse accumulator input should always be
greater than two module clocks due to input synchronizer circuitry. The
minimum pulse width for the input capture should always be greater than
the width of two module clocks due to input synchronizer circuitry.
Reset:
Reset:
Timer:
Read:
Read:
Write:
Write:
PA:
I/OC7
Bit 7
Bit 7
PT7
PAI
0
0
0
Figure 12-28. Timer Port Data Register (PORTT)
Figure 12-27. Timer Test Register (TIMTST)
= Unimplemented
I/OC6
PT6
6
0
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
I/OC5
PT5
5
0
0
5
0
NOTE
I/OC4
PT4
4
0
0
4
0
I/OC3
PT3
3
0
0
3
0
I/OC2
PT2
2
0
0
2
0
TCBYP
I/OC1
PT1
1
0
1
0
Freescale Semiconductor
PCBYP
I/OC0
Bit 0
Bit 0
PT0
0
0

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