MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 4

• Manufacturer Part Number: MC68HC912B32CFU8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC68HC912B32CFU8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Revision History
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
4
September,
January,
June,
June,
April,
April,
Date
2001
2001
2002
2003
2003
2003
2003
2004
2005
May,
July,
July,
Revision
Level
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
9.1
Figure 1-7. BDM Tool Connector — Added NC (no connect) designator to
pin 3
Figure 18-16. BDM Tool Connector — Added NC designator to pin 3
Table 14-2. Loop Mode Functions — Corrected table header, third column,
from DDRS1 to DDS1
WOMS bit description, fifth line, changed (via DDRS0/2)
to (via DDS0/2)
SSOE bit description, second line, changed DDRS7 to DDS7
In the table notes following the SPC0 bit description, corrected bit
designators from DDRS4, DDRS5, DDRS6, and DDRS7 to DDS4, DDS5,
DDS6, and DDS7.
Table 13-3. Prescaler Selection — Added value column and updated
prescale factors
19.11 EEPROM Characteristics — Corrected minimum and maximum
values for programming and erase times
Document type changed from Advance Information to Technical Data
reflecting qualification.
Figure 3-9. Condition Code Register (CCR) — Reset value for S bit
corrected from U to 1
14.2.3.3 SCI Control Register 2 — Removed erroneous reference to Port S
bit 3 in the definition for the transmitter enable bit (TE).
Figure 14-20. Port S Data Register (PORTS) — Removed erroneous pin
function for PS3 and PS2.
Reformatted to meet publication standards
19.2 Maximum Ratings — Corrected maximum values for VDD, VDDA,
VDDX, and VIn
19.7 ATD Maximum Ratings — Corrected maximum values for VRH and
VRL
Figure 19-1. Programming Voltage Envelope — Corrected maximum values
for VFP and VDD
19.12.1 Programming Voltage Supply Envelope — Added subsection for
clarity.
19.12.2 Example V
19.2 Maximum Ratings — Updated values
19.7 ATD Maximum Ratings — Updated values
Table 13-3. Prescaler Selection — Corrected prescaler factor for
values 6 and 7
Updated to meet Freescale identity guidelines.
M68HC12B Family Data Sheet, Rev. 9.1
FP
Protection Circuitry — Added subsection for clarity.
Description
Freescale Semiconductor
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