MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 47

• Manufacturer Part Number: MC68HC912B32CFU8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC68HC912B32CFU8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Freescale Semiconductor
Addr.
$008C
$008D
$0081
$0082
$0083
$0084
$0085
$0086
$0087
$0088
$0089
$008A
$008B
Notes:
1. Available only on MC68HC912B32 and MC68HC912BC32 devices.
2. Available only on MC68HC912B32 and MC68HC12BE32 devices.
3. Available only on MC68HC(9)12BC32 devices.
Timer Compare Force Register
Timer Output Compare 7 Mask
Timer System Control Register
Timer Output Compare 7 Data
Register Name
Timer Count Register High
Timer Count Register Low
Timer Control Register 1
Timer Control Register 2
Timer Control Register 3
Timer Control Register 4
Timer Mask Register 1
Timer Mask Register 2
Register (OC7M)
Register (OC7D)
See page 141.
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See page 143.
See page 144.
See page 144.
See page 144.
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See page 145.
See page 146.
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Reserved
(CFORC)
(TCNTH)
(TMSK1)
(TMSK2)
(TCNTL)
(TCTL1)
(TCTL2)
(TCTL3)
(TCTL4)
(TSCR)
Figure 2-1. Register Map (Sheet 8 of 19)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
M68HC12B Family Data Sheet, Rev. 9.1
OC7M7
OC7D7
EDG7B
EDG3B
FOC7
Bit 15
Bit 7
OM7
OM3
Bit 7
TEN
TOI
C7I
R
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented
OC7M6
OC7D6
EDG7A
EDG3A
TSWAI
FOC6
Bit 14
Bit 6
OL7
OL3
C6I
R
6
0
0
0
0
0
0
0
0
0
0
0
0
0
OC7M5
OC7D5
TSBCK
EDG6B
EDG2B
FOC5
PUPT
Bit 13
OM6
OM2
Bit 5
C5I
R
5
0
0
0
0
0
0
0
0
0
0
0
0
OC7M4
OC7D4
EDG6A
EDG2A
TFFCA
FOC4
RDPT
Bit 12
Bit 4
OL6
OL2
C4I
R
R
4
0
0
0
0
0
0
0
0
0
0
0
0
= Reserved
OC7M3
OC7D3
EDG5B
EDG1B
FOC3
TCRE
Bit 11
OM5
OM1
Bit 3
C3I
R
3
0
0
0
0
0
0
0
0
0
0
0
0
OC7M2
OC7D2
EDG5A
EDG1A
FOC2
Bit 10
Bit 2
OL5
OL1
PR2
C2I
R
2
0
0
0
0
0
0
0
0
0
0
0
0
U = Unaffected
OC7M1
OC7D1
EDG4B
EDG0B
FOC1
OM4
OM0
Bit 9
Bit 1
PR1
C1I
R
1
0
0
0
0
0
0
0
0
0
0
0
0
Registers
OC7M0
OC7D0
EDG4A
EDG0A
FOC0
Bit 0
Bit 8
Bit 0
PR0
OL4
OL0
C0I
R
0
0
0
0
0
0
0
0
0
0
0
0
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