M30626FJPFP#D5C Renesas Electronics America, M30626FJPFP#D5C Datasheet - Page 115

MCU 3/5V 512K 100-QFP

M30626FJPFP#D5C

Manufacturer Part Number
M30626FJPFP#D5C
Description
MCU 3/5V 512K 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M30626FJPFP#D5C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
10.4.3
Table 10.6
Table 10.7
NMI Interrupt
Key Input Interrupt
INT Interrupt
Timer A Interrupt
Timer B Interrupt
Serial Interface Interrupt
Low Voltage Detection
Interrupt
A0 to A19, D0 to D15, CS0 to CS3,
BHE
RD, WR, WRL, WRH
HLDA, BCLK
ALE
I/O ports
CLKOUT
10.4.3.1
10.4.3.2
In stop mode, all oscillator circuits are turned off, so are the CPU clock and the peripheral function clocks.
Therefore, the CPU and the peripheral functions clocked by these clocks stop operating. The least amount of
power is consumed in this mode. If the voltage applied to VCC1 and VCC2 pins is VRAM or more, the internal
RAM is retained. When applying 2.7 or less voltage to VCC1 and VCC2 pins, make sure VCC1 ≥ VCC2 ≥
VRAM.
However, the peripheral functions clocked by external signals keep operating. The following interrupts can be
used to exit stop mode. Table 10.6 lists Interrupts to Stop Mode and Use Conditions
The microcomputer is placed into stop mode by setting the CM10 bit in the CM1 register to “1” (all clocks
turned off). At the same time, the CM06 bit in the CM0 register is set to “1” (divide-by-8 mode) and the CM15
bit in the CM1 register is set to “1” (main clock oscillator circuit drive capability high).
Before entering stop mode, set the CM20 bit in the CM2 register to “0” (oscillation stop, re-oscillation detection
function disable).
Also, if the CM11 bit in the CM1 register is “1” (PLL clock for the CPU clock source), set the CM11 bit to “0”
(main clock for the CPU clock source) and the PLC07 bit in the PLC0 register to “0” (PLL turned off) before
entering stop mode.
Table 10.7 lists Pin Status in Stop Mode.
Jan 10, 2006
Interrupt
Stop Mode
When fC selected
When f8, f32 selected
Entering Stop Mode
Pin Status in Stop Mode
Interrupts to Stop Mode and Use Conditions
Pin Status in Stop Mode
Pin
Page 98 of 390
Can be used
Can be used
Can be used
Can be used
Can be used
(when external clock is selected)
Can be used
(Refer to 6.1 Low Voltage Detection Interrupt for an Operating Condition)
(when counting external pulses in event counter mode)
Retains status before stop mode Does not become a bus control
“H”
“H”
indeterminate
Retains status before stop mode Retains status before stop mode
Does not become a CLKOUT pin “H”
Memory Expansion Mode
Microprocessor Mode
Condition
Retains status before stop mode
pin
Single-Chip Mode
10. Clock Generation Circuit

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