XRT84L38IB Exar Corporation, XRT84L38IB Datasheet

XRT84L38IB

Manufacturer Part Number

XRT84L38IB

Description

Network Controller & Processor ICs 8 Ch T1/E1 Framer

Manufacturer

Exar Corporation

Datasheet

1.XRT84L38.pdf (453 pages)

Specifications of XRT84L38IB

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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SEPTEMBER 2006

GENERAL DESCRIPTION

The XRT84L38 is an eight-channel 1.544 Mbit/s or

2.048 Mbit/s DS1/E1/J1 framing controller. The

XRT84L38 contains an integrated DS1/E1/J1 framer

which

accumulation

specifications. Each framer has its own framing

synchronizer and transmit-receive slip buffers, and

can be independently enabled or disabled as

required and can be configured to frame to the

common DS1/E1/J1 signal formats

Each Framer block contains its own Transmit and

Receive T1/E1/J1 Framing function including 3 HDLC

controllers to support V5.2. Each Transmit HDLC

controller encapsulates contents of the Transmit

HDLC buffers into LAPD Message frames. Each

Receive HDLC controller extracts payload content of

Receive LAPD Message frames from the incoming

T1/E1/J1 data stream and writes it into the Receive

HDLC buffer. Each framer also contains a Transmit

Exar

IGURE

8kHz sync

System (Terminal) Side

1.544-16.384 Mbit/s

Corporation 48720 Kato Road, Fremont CA, 94538

OSC

1. XRT84L38 8-

Back Plane

provides

Local PCM

Highway

Rx Serial

Tx Serial

Clock

DS1/E1/J1

accordance

XRT84L38

1 of 8-channels

CHANNEL

Generator &

Signaling &

Rx Serial

Tx Serial

Data Out

Analyser

Data In

Alarms

PRBS

framing

DS1 (T1/E1/J1) F

with

Performance

Elastic Store

Slip Buffer

Tx Overhead In

JTAG

2-Frame

Monitor

ANSI/ITU_T

and

Interrupt

Link Controller

HDLC (LAPD)

96-byte Buffer

Interface

External Data

error

Controller &

Tx Framer

Rx Framer

DMA

Memory

RAMER

D[7:0]

•

(510) 668-7000

and Overhead Data Input port, which permits Data

Link Terminal Equipment direct access to the

outbound T1/E1/J1 frames Likewise, a Receive

Overhead output data port permits Data Link Terminal

Equipment direct access to the Data Link bits of the

inbound T1/E1/J1 frames.

The XRT84L38 fully meets all of the latest T1/E1/J1

specifications:

E1.403-1995, ANSI T1/E1.231-1993, ANSI T1/

E1.408-1990, AT&T TR 62411 (12-90) TR54016, and

ITU G-703, G.704, G706 and G.733, AT&T Pub.

43801, and ETS 300 011, 300 233, JT G.703, JT

G.704, JT G706, I.431. Extensive test and diagnostic

functions

Pseudo Random bit sequence (PRBS) test pattern

generation, Performance Monitor, Bit Error Rate

(BER) meter, forced error insertion, and LAPD

unchannelized data payload processing according to

ITU-T standard Q.921.

Applications and Features (next page)

Rx Overhead Out

Microprocessor

A[6:0]

Interface

LLB

Tx Encoder

Rx Encoder

Channel

Select

Loopback

Interface

Configuration, Control &

Control

LIU &

LIU

Intel/Motorola µP

•

Status Monitor

include

FAX (510) 668-7017

W R

ALE_AS

RDY_DTACK

ANSI T1/E1.107-1988, ANSI T1/

OCTAL T1/E1/J1 FRAMER

TxPOS

TxNEG

TxLineCLK 8

RxPOS

RxNEG

RxLineCLK 8

Loop-backs,

XRT84L38

8-CH T1/E1/LIU

TPOS

TNEG

TCLK1

RPOS

RNEG

RCLK1

Host Mode

XRT83L38

•

Interface

www.exar.com

µP

Boundary

Rx1

Rx8

1.544/2.048 MHz

Tx1

Tx8

Channels

8 DS1/E1

Line Side

REV. 1.0.1

Twisted

Pair

scan,

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