XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 96

no-image

XRT84L38IB

Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT84L38IB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
XRT84L38
OCTAL T1/E1/J1 FRAMER
Synchronization Mux Register (SMR) - T1 Mode (Indirect Address = 0xn0H, 0x09H)
B
B
Reserved
IT
IT
B
N
R/W
N
1-0
IT
UMBER
0
UMBER
7
6
7
Alarm Indication Signal
Detection Select
Reserved
Transmit Multi-frame
Alignment
Multi-frame
Alignment
Transmit
B
R/W
IT
0
6
B
B
IT
IT
N
N
AME
AME
Synchroniza-
Super-frame
Transmit
B
R/W
tion
IT
0
5
B
B
Synchroniza-
IT
IT
R/W
R/W
R/W
tion Signal
Direction
T
T
YPE
YPE
B
R/W
IT
0
4
Alarm Indication Signal Detection Select:
These READ/WRITE bit-fields activate and de-activate Alarm
Indication Signal Detection of the framer.
When these bits are set to 00:
The framer disables detection of AIS Alarm.
When these bits are set to 01:
The framer enables detection of unframed AIS Alarm.
When these bits are set to 10:
The framer enables detection of AIS16 Alarm.
When these bits are set to 11:
The framer enables detection of framed AIS Alarm.
Transmit Multi-frame Alignment:
This READ/WRITE bit-field forces the framer to align the Trans-
mit Multi-frame boundary with the back-plane Multi-frame Syn-
chronization Pulse.
When this bit is set to zero:
The Transmit Multi-frame boundary is not aligned with the back-
plane Multi-frame Synchronization Pulse.
When this bit is set to one:
The Transmit Multi-frame boundary is forced to align with the
back-plane Multi-frame Synchronization Pulse.
76
Reserved
B
R/W
IT
0
3
Reserved
B
B
B
R/W
IT
IT
IT
0
D
D
2
ESCRIPTION
ESCRIPTION
CRC-6
Source
B
R/W
IT
0
1
Framing Bit
Source
REV. 1.0.1
B
R/W
IT
0
0

Related parts for XRT84L38IB