XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 130
XRT84L38IB
Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet
1.XRT84L38.pdf
(453 pages)
Specifications of XRT84L38IB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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XRT84L38
OCTAL T1/E1/J1 FRAMER
B
IT
N
UMBER
4
3
2
Transmit Fractional E1
Input Enable
Transmit Clock Inversion
Transmit Multiplex
Enable
B
IT
N
AME
B
IT
R/W
R/W
R/W
T
YPE
Transmit Fractional E1 Input Enable:
When this bit is set to 0:
The Transmit Time-slot Indication bits (TxTSb[4:0] are outputting
five-bit binary values of Time-slot number (0-31) being accepted
and processed by the Transmit Payload Data Input Interface
block of the framer.
The Transmit Time-slot Indicator Clock signal (TxTSClk_n) is a
256KHz clock that pulses HIGH for one E1 bit period whenever
the Transmit Payload Data Input Interface block is accepting the
LSB of each of the twenty-four time slots.
When this bit is set to 1:
The TxTSb[0]_n bit becomes the Transmit Fractional E1 Input
signal (TxFrTD_n) which carries Fractional E1 payload data into
the framer.
The TxTSb[1]_n bit becomes the Transmit Signaling Data Input
signal (TxSig_n) which is used to insert robbed-bit signaling data
into the outbound E1 frame.
The TxTSb[2]_n bit serially outputs all five-bit binary values of
the Time Slot number (0-31) being accepted and processed by
the Transmit Payload Data Input Interface block of the framer.
The TxTSb[3]_n bit becomes the Transmit Overhead Synchroni-
zation Pulse (TxOHSync_n) which is used to output an Over-
head Synchronization Pulse that indicates the first bit of each
E1multi-frame.
The TxTSClk_n will output gaped fractional E1 clock that can be
used by Terminal Equipment to clock out Fractional E1 payload
data at rising edge of the clock. Or,
The TxTSClk_n pin will be a clock enable signal to Transmit
Fractional E1 Input signal (TxFrTD_n) when the un-gaped
Transmit Serail Input Clock (TxSerClk_n) is used to clock in
Fractional E1 Payload Data into the framer.
Transmit Clock Inversion:
When this bit is set to 0:
Serial data transition happens on rising edge of the Transmit
Serial Clock.
When this bit is set to 1:
Serial data transition happens on falling edge of the Transmit
Serial Clock.
Transmit Multiplex Enable:
When this bit is set to 0:
The Transmit Back-plane Interface block is configured to non-
channel-multiplexed mode
When this bit is set to 1:
The Transmit Back-plane Interface block is configured to chan-
nel-multiplexed mode
110
B
IT
D
ESCRIPTION
REV. 1.0.1
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