XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 327

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
RECEIVE DATA LINK SELECT REGISTER (TDLSR) (INDIRECT ADDRESS = 0XN0H, 0X0AH)
If the Receive Data Link Source Select bits of the Receive Data Link Select Register are set to 10, the Receive
Overhead Output Interface Block becomes Output source of the FDL bits.
The XRT84L38 allows the user to select bandwidth of the Facility Data Link Channel in ESF framing format
mode. The FDL can be either a 4KHz or 2KHz data link channel. The Receive Data Link Bandwidth Select bits
of the Receive Data Link Select Register (RDLSR) determine the bandwidth of FDL channel in ESF framing
format mode.
The table below shows configuration of the Receive Data Link Bandwidth Select bits of the Receive Data Link
Select Register (TDLSR).
RECEIVE DATA LINK SELECT REGISTER (TDLSR) (INDIRECT ADDRESS = 0XN0H, 0X0AH)
Figure 104
Overhead Output Interface module in ESF framing format mode.
N
N
UMBER
UMBER
B
1-0
B
5-4
IT
IT
below shows the timing diagram of the Output and output signals associated with the DS1 Receive
Receive Data Link
Destination Select
Receive Data Link
Bandwidth Select
B
B
IT
IT
N
N
AME
AME
B
B
IT
IT
R/W
R/W
T
T
YPE
YPE
00 - The extracted Facility Data Link bits are stored in either the LAPD con-
troller or the SLCâ96 buffer. At the same time, the extracted Facility Data
Link bits are outputted from the framer through the Receive Serial Data
Output Interface via the RxSer_n pins.
01 - The extracted Facility Data Link bits are outputted from the framer
through the Receive Serial Data Output Interface via the RxSer_n pins.
10 - The extracted Facility Data Link bits are outputted from the framer
through the Receive Overhead Output Interface via the RxOH_n pins. At
the same time, the extracted Facility Data Link bits are outputted from the
framer through the Receive Serial Data Output Interface via the RxSer_n
pins.
11 - The Facility Data Link bits are forced to one by the framer.
00 - The Facility Data Link is a 4KHz channel. All available FDL bits (first
bit of every other frame) are used as data link bits.
01 - The Facility Data Link is a 2KHz channel. Only the odd FDL bits (first
bit of frame 1, 5, 9…) are used as data link bits.
10 - The Facility Data Link is a 2KHz channel. Only the even FDL bits (first
bit of frame 3, 7, 11…) are used as data link bits.
307
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
OCTAL T1/E1/J1 FRAMER
XRT84L38