XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 345

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XRT84L38IB

Manufacturer Part Number
XRT84L38IB
Description
Network Controller & Processor ICs 8 Ch T1/E1 Framer
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT84L38IB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.1
The table below shows configurations of the Transmit Fractional DS1 bit of the Transmit Interface Control
Register (TICR).
TRANSMIT INTERFACE CONTROL REGISTER (TICR) (INDIRECT ADDRESS = 0XN0H, 0X20H)
Depends on applications, the Terminal Equipment can embed signaling information into the DS1 PCM data
and then send the data to the XRT84L38 framer device. In this case, the user should configure the framer not
to insert any signaling data. The input DS1 PCM data will then be directed to the Transmit LIU Interface without
any modifications.
The Transmit Signaling Control Register (TSCR) of each channel selects source of signaling data to be
inserted into the outgoing DS1 frame and enables robbed-bit signaling. As we mentioned before, the signaling
data can be inserted from Transmit Signaling Control Registers (TSCR) of each timeslot, from the TxSig_n
input pin or from the TxSer_n input pin.
The Transmit Signaling Data Source Select [1:0] bits of the Transmit Signaling Control Register (TSCR)
determines from which sources the signaling data is inserted from. The table below shows configurations of the
Transmit Signaling Data Source Select [1:0] bits of the Transmit Signaling Control Register (TSCR).
TRANSMIT SIGNALING CONTROL REGISTER (TSCR) (INDIRECT ADDRESS = 0XN2H, 0X40H - 0X57H)
9.5.2.3
9.5.2.4
N
N
UMBER
UMBER
B
B
1-0
4
IT
IT
Transmit Signaling
Fractional DS1
Insert Signaling Data from TxSer_n Pin
Enable Robbed-bit Signaling and Signaling Data Source Control
Source Select
B
B
Transmit
IT
IT
N
N
AME
AME
B
B
IT
IT
R/W
R/W
T
T
YPE
YPE
This READ/WRITE bit-field permits the user to determine which one of the
two functions the multiplexed I/O pin of TxTSb[0]_n/TxSig_n is spotting.
0 - This pin is configured as TxTSb[0]_n pin, it outputs bit 0 of the timeslot
number of the DS1 PCM data that is transmitting.
1 - This pin is configured as TxSig_n pin, it acts as an input source for the
signaling bits to be transmitted in the outbound DS1 frames
00 - No signaling data is inserted into the input DS1 PCM data by the
framer. However, the user can embed signaling data into DS1 PCM data
before routing the PCM data into the framer.
01 - Signaling data is inserted into the input DS1 PCM data from TSCR
register of each timeslot.
10 - Signaling data is inserted into the input DS1 PCM data from the
TxSig_n input pin.
11 - No signaling data is inserted into the input DS1 PCM data by the
framer. However, the user can embed signaling data into DS1 PCM data
before routing the PCM data into the framer.
325
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
OCTAL T1/E1/J1 FRAMER
XRT84L38

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