NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 259

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5—Intel
Table 137. Features Supported by Intel
November 2007
Order Number: 300641-004US
®
Note: Throughout this document, references to D31:F5 indicate that the audio function exists
Note: Throughout this document, references to tertiary, third, or triple codecs refer to the
6300ESB ICH
in PCI Device 31, Function 5. References to D31:F6 indicate that the modem function
exists in PCI Device 31, Function 6.
third codec in the system connected to the AC_SDIN[2] pin. The AC’97 2.2 specification
refers to non-primary codecs as multiple secondary codecs. To avoid confusion and
excess verbiage this EDS refers to it as the third or tertiary codec.
PCI Modem
function
AC-link
Multiple Codec
Feature
NOTES:
1. Audio Codec IDs are remappable and not limited to 00,01,10
2. Modem Codec IDs are remappable and limited to 00,01
3. When using multiple codecs, the Modem Codec must be ID 01.
• Read/write access to modem codec registers 3Ch-58h and vendor registers
• 16-bit mono modem line1 output and input, up to 48 KHz (slot 5)
• Low latency GPIO[15:0] via hardwired update between slot 12 and PCI IO
• Programmable PCI interrupt on modem GPIO input changes via slot 12
• SCI event generation on AC_SDIN[2:0] wake-up signals
• AC’97 2.0 compliant AC-link interface
• Variable sample rate output support through AC’97 SLOTREQ protocol
• Variable sample rate input support through monitoring of slot valid tag bits
• 3.3 V digital operation meets AC’97 2.2 DC switching levels
• AC-link IO driver capability meets AC’97 2.2 triple codec specifications
• Codec register status reads must be returned with data in the next AC-link
• Triple codec addressing: All AC’97 Audio codec register accesses are
• Modem codec addressing: All AC’97 Modem codec register accesses are
• Triple codec receive capability through AC_SDIN[2:0] pins
• AC_SDIN mapping to DMA engine mapping capability allows for
5Ah-7Eh
register.
GPIO_INT
(slots 3,4,5,6,7,8,9,10,11)
(slots 3,4,5,6)
frame, per AC’97 2.2 spec.
addressable to codec ID 00 (primary), codec ID 01 (secondary), or codec
ID 10 (tertiary).
addressable to codec ID 00 (primary) or codec ID 01 (secondary).
(AC_SDIN[2:0] frames are internally validated, synch’d, and OR’d
depending on the Steer Enable bit status in the SDM register)
simultaneous input from three different audio codecs.
®
6300ESB ICH (Sheet 2 of 2)
Description
Intel
®
6300ESB I/O Controller Hub
259
DS