NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 742
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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Compliant
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20.1.5
20.1.6
Intel
DS
742
Bits
Bits
Default Value:
Default Value:
6:4
7:0
7
3
2
1
0
®
Table 665. Offset 09h: PI—Programming Interface (SATA–D31:F2)
Table 666. Offset 0Ah: SCC—Sub Class Code (SATA–D31:F2)
6300ESB I/O Controller Hub
Device:
Device:
Offset:
Offset:
SOP_MODE_CAP
SOP_MODE_SEL
POP_MODE_CAP
POP_MODE_SEL
Sub Class Code
Offset 09h: PI—Programming Interface (SATA–
D31:F2)
Offset 0Ah: SCC—Sub Class Code (SATA–D31:F2)
Reserved
31
09h
8Ah
Name
31
0Ah
01h or 04h
Name
This read-only bit is a ’1’ to indicate that the SATA Controller
supports bus master operation
Reserved. Will always return 0.
This read-only bit is a ’1’ to indicate that the secondary
controller supports both legacy and native modes.
This read-write bits determines the mode that the secondary
IDE channel is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
This read-only bit is a ’1’ to indicate that the primary
controller supports both legacy and native modes.
This read-write bits determines the mode that the primary
IDE channel is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
01h when Dev 31, Func 0, offset ACh, bit 23 is ‘0’; indicates
IDE controller
04h when Dev 31, Func 0, offset ACh, bit 23 is ‘1’; indicates
RAID controller
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
2
Read/Write
8-bit
2
Read-Only
8-bit
Order Number: 300641-004US
Intel
®
6300ESB ICH—20
November 2007
Access
Access
R/W
R/W
RO
RO
RO
RO
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