NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 805

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

22—Intel
Table 719. Ultra ATA Timing (Mode 3, Mode 4, Mode 5) (Sheet 2 of 2)
November 2007
Order Number: 300641-004US
NOTES:
1. The specification symbols in parentheses correspond to the AT Attachment - 6 with Packet Interface (ATA/
2. See the AT Attachment - 6 with Packet Interface (ATA/ATAPI - 6) specification for further details on
Sym
t92a
t92b
t96a
t96b
t98a
t98b
t91
t93
t94
t95
t97
t99
ATAPI - 6) specification name.
measuring these timing parameters.
®
6300ESB ICH
DMACK setup/hold Time (Tack)
CRC Word Setup Time at Host
(Tcvs)
CRC Word Hold Time at Sender
CRC word valid hold time at
sender (from DMACK# negation
until CRC may become invalid)
(see
STROBE output released-to-
driving to the first transition of
critical timing (Tzfs)
Data Output Released-to-Driving
Until the First Transition of Critical
Timing (Tdzfs)
Unlimited Interlock Time (Tui)
Maximum time allowed for output
drivers to release (from asserted
or negated) (Taz)
Drivers to assert or negate (from
released) (Tzad)
Ready-to-final-STROBE time (no
STROBE edges shall be sent this
long after negation of DMARDY#)
(Trfs)
Maximum time before releasing
IORDY (Tiordyz)
Minimum time before driving
IORDY (see
Time from STROBE edge to
negation of DMARQ or assertion of
STOP (when sender terminates a
burst) (Tss)
Note
Parameter (1)
2) (Tcvh)
Note
2) (Tziordy)
20.0
Min
6.2
20
20
50
0
0
0
0
Mode 3
(ns)
Max
10
60
20
Min
6.7
6.2
6.7
20
50
Mode 4
0
0
0
0
(ns)
Max
10
60
20
10.0
Min
20
10
35
25
50
Mode 5
0
0
0
(ns)
Max
Intel
10
50
20
®
6300ESB I/O Controller Hub
Measuring
See Note 2
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Connector
Location
Sender
Sender
Sender
Device
Device
Device
Device
Host
Host
Host
Host
Figure 5
Figure 5
Figure 5
Figure 5
Figure 5
Figure 5
Figure
5
5
2
2
2
4
805
DS