EP2S90F1020I4N Altera, EP2S90F1020I4N Datasheet - Page 117

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EP2S90F1020I4N

Manufacturer Part Number
EP2S90F1020I4N
Description
IC STRATIX II FPGA 90K 1020-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S90F1020I4N

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520488
Number Of I /o
758
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1020-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
90960
# I/os (max)
758
Frequency (max)
711.24MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520488
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1920
EP2S90F1020I4N
The Quartus II software has an Auto Usercode feature where you can
choose to use the checksum value of a programming file as the JTAG user
code. If selected, the checksum is automatically loaded to the USERCODE
register. Turn on the Auto Usercode option by clicking Device & Pin
Options, then General, in the Settings dialog box (Assignments menu).
Table 3–2. Stratix II Boundary-Scan Register Length
Table 3–3. 32-Bit Stratix II Device IDCODE
Device
Version
(4 Bits)
EP2S15
0000
EP2S30
0000
EP2S60
0001
EP2S90
0000
EP2S130
0000
EP2S180
0000
Notes to
Table
3–3:
(1)
The most significant bit (MSB) is on the left.
(2)
The IDCODE's least significant bit (LSB) is always 1.
1
Altera Corporation
May 2007
Device
EP2S15
EP2S30
EP2S60
EP2S90
EP2S130
EP2S180
IDCODE (32 Bits)
Manufacturer Identity (11
Part Number (16 Bits)
0010 0000 1001 0001
0010 0000 1001 0010
0010 0000 1001 0011
0010 0000 1001 0100
0010 0000 1001 0101
0010 0000 1001 0110
Stratix, Stratix II, Cyclone, and Cyclone II devices must be
within the first 17 devices in a JTAG chain. All of these devices
have the same JTAG controller. If any of the Stratix, Stratix II,
Cyclone, and Cyclone II devices are in the 18th or after they fail
configuration. This does not affect SignalTap II.
Configuration & Testing
Boundary-Scan Register Length
1,140
1,692
2,196
2,748
3,420
3,948
(1)
LSB (1 Bit)
Bits)
000 0110 1110
1
000 0110 1110
1
000 0110 1110
1
000 0110 1110
1
000 0110 1110
1
000 0110 1110
1
Stratix II Device Handbook, Volume 1
(2)
3–3

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