MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 27

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Figure 9
8.3.2.2
Table 26
Freescale Semiconductor
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%
GTX_CLK data clock fall time (80%-20%)
Notes:
1. The symbols used for timing specifications follow the pattern t
2. Data valid t
RX_CLK clock period
RX_CLK duty cycle
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
RX_CLK to RXD[7:0], RX_DV, RX_ER hold time
RX_CLK clock rise (20%–80%)
and t
(GT) with respect to the t
the valid state (V) to state or setup time. Also, t
reference (K) going to the high state (H) relative to the time date input signals (D) going invalid (X) or hold time. Note that, in
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
is used with the appropriate letter: R (rise) or F (fall).
delay).
(first two letters of functional block)(reference)(state)(signal)(state)
shows the GMII transmit AC timing diagram.
provides the GMII receive AC timing specifications.
GTKHDV
GMII Receive AC Timing Specifications
Parameter/Condition
Parameter/Condition
GTX_CLK
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
TXD[7:0]
TX_EN
TX_ER
to GTX_CLK Min setup time is a function of clock period and max hold time (Min setup = cycle time – Max
Table 25. GMII Transmit AC Timing Specifications (continued)
GTX
clock reference (K) going to the high state (H) relative to the time date input signals (D) reaching
GTX
Table 26. GMII Receive AC Timing Specifications
Figure 9. GMII Transmit AC Timing Diagram
represents the GMII(G) transmit (TX) clock. For rise and fall times, the latter convention
t
t
GTXH
GTKHDV
t
GTX
GTKHDX
symbolizes GMII transmit timing (GT) with respect to the t
t
GRXH
Symbol
Symbol
for outputs. For example, t
t
t
GRDXKH
GRDVKH
t
t
t
GRXR
GTXF
GRX
(first two letters of functional block)(signal)(state)(reference)(state)
t
/t
GTXF
GRX
1
1
t
Enhanced Three-Speed Ethernet (eTSEC), MII Management
GTKHDX
Min
Min
2.0
0.5
—
—
—
35
t
GTXR
GTKHDV
Typ
Typ
8.0
—
—
—
—
—
symbolizes GMII transmit timing
Max
Max
1.0
1.0
65
—
—
—
Unit
Unit
ns
ns
ns
ns
ns
%
GTX
for inputs
Notes
Notes
—
clock
—
—
—
—
—
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