MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 72

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MPC8533EVTARJ

Manufacturer Part Number
MPC8533EVTARJ
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTARJ

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.067GHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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17.4.3
Table 55
at the component pins.
72
UI
V
T
RX-EYE
RX-DIFFp-p
Symbol
defines the specifications for the differential input at all receivers. The parameters are specified
Figure 52. Minimum Transmitter Timing and Voltage Output Compliance Specifications
Differential Receiver (RX) Input Specifications
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
(D+ D– Crossing Point)
Unit interval
Differential peak-to-
peak input voltage
Minimum receiver
eye width
V
RX-DIFF
Parameter
Table 55. Differential Receiver (RX) Input Specifications
= 0 mV
566 mV (3 dB) >= V
0.07 UI = UI – 0.3 UI (J
399.88
0.175
Min
0.4
V
V
TX-DIFFp-p-MIN
TX-DIFFp-p-MIN
[De-Emphasized Bit]
Nom
[Transition Bit]
[Transition Bit]
400
TX-DIFFp-p-MIN
400.12
1.200
Max
= 800 mV
= 800 mV
TX-TOTAL-MAX
>= 505 mV (4 dB)
Units
ps
UI
V
(D+ D– Crossing Point)
)
Each UI is 400 ps ± 300 ppm. UI does not
account for spread spectrum clock dictated
variations. See Note 1.
V
See Note 2.
The maximum interconnect media and
transmitter jitter that can be tolerated by the
receiver can be derived as T
= 1 – T
See Notes 2 and 3.
V
RX-DIFFp-p
TX-DIFF
RX-EYE
= 0 mV
= 2 × |V
= 0.6 UI.
Comments
Freescale Semiconductor
RX-D+
– V
RX-MAX-JITTER
RX-D–
|

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