MPC8533EVTARJ Freescale Semiconductor, MPC8533EVTARJ Datasheet - Page 30

• Manufacturer Part Number: MPC8533EVTARJ
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Enhanced Three-Speed Ethernet (eTSEC), MII Management
Figure 13
Figure 14
8.5
This section describes the TBI transmit and receive AC timing specifications.
30
At recommended operating conditions with L/TVDD of 3.3 V ± 5%.or 2.5 V ± 5%.
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise (20%–80%)
RX_CLK clock fall time (80%–20%)
Note:
1. The symbols used for timing specifications follow the pattern of t
inputs and t
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
going to the high (H) state or setup time. Also, t
signals (D) went invalid (X) relative to the t
the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
example, the subscript of t
with the appropriate letter: R (rise) or F (fall).
TBI AC Timing Specifications
provides the AC test load for eTSEC.
shows the MII receive AC timing diagram.
Parameter/Condition
(first two letters of functional block)(reference)(state)(signal)(state)
RXD[3:0]
RX_CLK
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
RX_DV
RX_ER
Table 28. MII Receive AC Timing Specifications (continued)
Output
MRX
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
Figure 14. MII Receive AC Timing Diagram
t
t
MRXH
MRDVKH
MRX
Figure 13. eTSEC AC Test Load
t
MRX
clock reference (K) going to the low (L) state or hold time. Note that, in general,
Z
MRDXKL
0
= 50 Ω
Symbol
t
t
MRDXKH
MRDVKH
t
t
Valid Data
MRXR
MRXF
symbolizes MII receive timing (GR) with respect to the time data input
1
t
MRXF
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
10.0
10.0
Min
1.0
1.0
R
t
L
MRDXKL
t
MRXR
= 50 Ω
Typ
—
—
—
—
LV
DD
MRDVKH
/2
Max
4.0
4.0
—
—
MRX
Freescale Semiconductor
symbolizes MII receive
clock reference (K)
Unit
ns
ns
ns
ns
Notes
—
—
—
—
for