PCA9665PW,118 NXP Semiconductors, PCA9665PW,118 Datasheet - Page 29

• Manufacturer Part Number: PCA9665PW,118
• Description: IC CNTRLR PARALLEL/I2C 20TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9665PW,118

• Package / Case: 20-TSSOP
• Controller Type: I²C Bus Controller
• Interface: I²C
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Supply: 100µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4070-2; 935279244118; PCA9665PW-T; PCA9665PW-T

NXP Semiconductors
PCA9665_3
Product data sheet
Fig 10. Format and states in the Slave Transmitter Byte mode (MODE = 0)
reception of own
slave address and
transmission of one
or more data bytes
arbitration lost as MST and
addressed as slave
(1) See
(2) Defined state when a single byte is transmitted and an ACK is received.
(3) Defined state when a single byte is transmitted and a NACK is received.
(4) Defined state when a single byte is transmitted and the PCA9665 goes to the non-addressed mode (AA = 0) and an ACK is
DATA
received.
from master to slave
from slave to master
Table
8.3.4 Slave Transmitter Byte mode
31.
n
A
In the Slave Transmitter Byte mode, a number of data bytes are transmitted to a master
receiver one byte at a time (see
Receiver Byte mode. When I2CADR and I2CCON have been initialized, the PCA9665
waits until it is addressed by its own slave address followed by the data direction bit which
must be ‘1’ (R) for the PCA9665 to operate in the Slave Transmitter mode. After its own
slave address and the R bit have been received, the Serial Interrupt flag (SI) is set, the
Interrupt line (INT) goes LOW and I2CSTA is loaded with A8h. This status code is used to
vector to an interrupt service routine, and the appropriate action to be taken is detailed in
Table
The Slave Transmitter Byte mode may also be entered if arbitration is lost while the
PCA9665 is in the master mode. See state B0h and appropriate actions in
If the AA bit is reset during a transfer, the PCA9665 will transmit the last byte of the
transfer and enter state C8h. The PCA9665 is switched to the not addressed slave mode
and will ignore the master receiver if it continues the transfer. Thus the master receiver
receives all ‘1’s as serial data. While AA is reset, the PCA9665 does not respond to its
own slave address. However, the I
be resumed at any time by setting AA. This means that the AA bit may be used to
temporarily isolate SIO from the I
any number of data bytes and
their associated Acknowledge bits
This number (contained in I2CSTA) corresponds
to a defined state of the I
S
32.
SLA
R
2
C-bus.
A8h
B0h
Rev. 03 — 12 August 2008
A
A
(1)
DATA
last data byte transmitted;
switched to Not Addressed slave
(AA bit in I2CCON = 0)
Figure
2
C-bus.
2
C-bus is still monitored, and address recognition may
10). Data transfer is initialized as in the Slave
B8h
(2)
A
Fm+ parallel bus to I
DATA
C0h
C8h
(3)
(4)
A
A
on STOP
P or S
F8h
ALL '1's
PCA9665
© NXP B.V. 2008. All rights reserved.
2
C-bus controller
Table
002aab027
on STOP
P or S
F8h
32.
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