PCA9665PW,118 NXP Semiconductors, PCA9665PW,118 Datasheet - Page 40

• Manufacturer Part Number: PCA9665PW,118
• Description: IC CNTRLR PARALLEL/I2C 20TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9665PW,118

• Package / Case: 20-TSSOP
• Controller Type: I²C Bus Controller
• Interface: I²C
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Supply: 100µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4070-2; 935279244118; PCA9665PW-T; PCA9665PW-T

NXP Semiconductors
PCA9665_3
Product data sheet
8.4.3 Slave Receiver Buffered mode
In the Slave Receiver Buffered mode, a number of data bytes are received from a master
transmitter several bytes at a time (see
mode, I2CADR and I2CCON must be loaded as shown in
Table 37.
The upper 7 bits are the I
by a master. GC is the control bit that allows the PCA9665 to respond or not to the
General Call address (00h).
When programmed to logic 1, the PCA9665 will acknowledge the General Call address.
When programmed to logic 0, the PCA9665 will not acknowledge the General Call
address.
Table 38.
Table 39.
ENSIO must be set to logic 1 to enable the I
enable the PCA9665 to acknowledge its own slave address; STA, STO, and SI must be
reset.
When I2CADR and I2CCON have been initialized, the PCA9665 waits until it is addressed
by its own slave address followed by the data direction bit which must be ‘0’ (W) to operate
in the Slave Receiver mode. After its own slave address and the W bit have been
received, the Serial Interrupt flag (SI) is set, the Interrupt line (INT) goes LOW and I2CSTA
is loaded with 60h. This status code is used to vector to an interrupt service routine, and
the appropriate action to be taken is detailed in
The Slave Receiver Buffered mode may also be entered when:
Appropriate actions to be taken from these status codes are also detailed in
The byte count register (I2CCOUNT) is programmed with the number of bytes that need
to be sent in a single sequence (BC[6:0]) as shown in
Bit
Symbol
Value
Bit
Symbol
Value
Bit
Symbol
Value
•
•
The arbitration is lost while the PCA9665 is in the master mode. See status 68h and
D8h.
The General Call Address (00h) has been received (General Call address enabled
with GC = 1). See status D0h.
I2CADR initialization
I2CCON initialization
I2CCOUNT programming
AD7
AA
LB
X
7
7
1
7
Rev. 03 — 12 August 2008
ENSIO
AD6
BC6
2
number of bytes received in a single sequence (1 byte to 68 bytes)
C-bus address to which PCA9665 will respond when addressed
6
6
1
6
AD5
BC5
STA
5
5
0
5
own slave address
Figure
STO
AD4
BC4
2
C-bus interface. The AA bit must be set to
0
4
4
4
13). To initiate the Slave Receiver Byte
Table
Fm+ parallel bus to I
AD3
BC3
40.
Table
SI
3
3
0
3
Table 37
39.
AD2
BC2
X
2
2
2
-
and
PCA9665
© NXP B.V. 2008. All rights reserved.
2
Table
C-bus controller
AD1
BC1
X
1
1
1
-
Table
38.
MODE
40.
BC0
40 of 90
GC
X
0
0
1
0