PCA9665PW,118 NXP Semiconductors, PCA9665PW,118 Datasheet - Page 49

• Manufacturer Part Number: PCA9665PW,118
• Description: IC CNTRLR PARALLEL/I2C 20TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9665PW,118

• Package / Case: 20-TSSOP
• Controller Type: I²C Bus Controller
• Interface: I²C
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Supply: 100µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4070-2; 935279244118; PCA9665PW-T; PCA9665PW-T

NXP Semiconductors
PCA9665_3
Product data sheet
8.5.3 Buffered Slave Transmitter mode
3. Program I2CCON register to initiate the Master Receiver Buffered sequence. In
4. After reading the I2CSTA status register, the I2CCON is programmed with STA = 0.
5. When the sequence has been executed, an Interrupt is asserted and the SI bit is set
6. More sequences (program the I2CCOUNT register, write to the I2CCON register, read
1. An interrupt is asserted and the SI bit is set in the I2CCON register when the
2. Program the I2CCOUNT register with the number of bytes that need to be sent to the
3. Load the data bytes in I2CDAT buffer. The different bytes to be sent will be stored in
4. The I2CCON is programmed to clear the previous Interrupt. The bytes loaded into the
5. When the sequence has been executed (BC[6:0] bytes sent or the master sent a
Master mode, if STA = 1, a START command is sent. An interrupt will be asserted and
the SI bit is set in the I2CCON register after the START has been sent. The I2CSTA
register contains the status of the transmission. MODE bit must be set to ‘1’ each time
a write to the I2CCON register is performed.
That clears the previous Interrupt. If a START command has been previously sent, the
I
I
data from the addressed slave device.
Remark: The PCA9665 is already a master receiver device if a buffered sequence
has been previously executed.
in the I2CCON register. The I2CSTA register contains the status of the transmission
and the I2CCOUNT register contains the number of bytes that have been received.
I2CDAT buffer contains all the data that has been received and can be read by the
microcontroller.
the I2CSTA register when sequence has been executed, read the I2CDAT buffer) can
be performed as long as a STOP or a Repeated START command has not been sent.
To be able to end the reception, the last buffered sequence must be performed with
LB = 1. Master Receiver Buffered mode ends when the I2CCOUNT register is
programmed with STO = 1.
PCA9665’s own slave address has been detected on the I
address defined in the I2CADR register). In Slave Transmitter mode, R/W = 1.
I
mode only.
the PCA9665 buffer. There is no protection against writing over a buffer’s boundary. If
more than 68 bytes are written to the buffer, the data at address 00h will be
overwritten. The number of bytes that needs to be loaded in I2CDAT is equal to
BC[6:0] in the I2CCOUNT register. The number of data bytes sent is equal to BC[6:0],
therefore, if the number of data bytes loaded is greater than BC[6:0], the additional
data will not be sent. If the number of data bytes written to the buffer is less than
BC[6:0], the PCA9665 will still send out BC[6:0] data bytes.
buffer are sent to the I
I2CCON register is performed.
NACK), an Interrupt is asserted and the SI bit is set in the I2CCON register. The
I2CSTA register contains the status of the transmission and the I2CCOUNT register
contains the number of bytes that have been sent to the I
2
2
2
C-bus address + R/W = 1 byte that has been loaded into the buffer is sent to the
C-bus, the PCA9665 then becomes a master receiver device and starts receiving
C-bus (BC[6:0] has a value from 01h to 44h). LB bit is used for Receiver Buffered
Rev. 03 — 12 August 2008
2
C-bus. MODE bits must be set to ‘1’ each time a write to the
Fm+ parallel bus to I
2
2
C-bus.
C-bus (AA = 1, own slave
PCA9665
© NXP B.V. 2008. All rights reserved.
2
C-bus controller
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