PIC18F4520-I/P Microchip Technology Inc., PIC18F4520-I/P Datasheet - Page 147

• Manufacturer Part Number: PIC18F4520-I/P
• Description: 40 Pin, 32 KB Flash, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4520-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

The CCPRxH register and a 2-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation.
When the CCPRxH and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCPx pin is cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by the equation:
TABLE 15-4:
15.4.3
The PWM auto-shutdown features of the enhanced CCP
module are also available to CCP1 in 28-pin devices.
The operation of this feature is discussed in detail in
Section 16.4.7 “Enhanced PWM Auto-Shutdown”.
Auto-shutdown features are not available for CCP2.
 2004 Microchip Technology Inc.
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
PWM Frequency
PWM AUTO-SHUTDOWN
(CCP1 ONLY)
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
2.44 kHz
FFh
16
10
PIC18F2420/2520/4420/4520
9.77 kHz
Preliminary
FFh
10
4
39.06 kHz
EQUATION 15-3:
15.4.4
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
Note:
FFh
10
1
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPRxL register and CCPxCON<5:4> bits.
Make the CCPx pin an output by clearing the
appropriate TRIS bit.
Set the TMR2 prescale value, then enable
Timer2 by writing to T2CON.
Configure the CCPx module for PWM operation.
PWM Resolution (max)
If the PWM duty cycle value is longer than
the PWM period, the CCP2 pin will not be
cleared.
SETUP FOR PWM OPERATION
156.25 kHz
3Fh
1
8
312.50 kHz
=
1Fh
1
7
log
-----------------------------bits
log
DS39631A-page 145


---------------
F
F
PWM
OSC
2
416.67 kHz


6.58
17h
1