PIC18F4520-I/P Microchip Technology Inc., PIC18F4520-I/P Datasheet - Page 353

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PIC18F4520-I/P

Manufacturer Part Number
PIC18F4520-I/P
Description
40 Pin, 32 KB Flash, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4520-I/P

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
FIGURE 26-14:
TABLE 26-16: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
 2004 Microchip Technology Inc.
70
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1:
Param
No.
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
Note:
2:
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
Tb2b
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ SS to SDO Output High-Impedance
TscR
TscF
TscH2doV,
TscL2doV
TscH2ssH,
TscL2ssH
Symbol
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
Refer to Figure 26-4 for load conditions.
SS
SCK Input High Time
(Slave mode)
SCK Input Low Time
(Slave mode)
Setup Time of SDI Data Input to SCK Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time (Master mode) PIC18FXXXX
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK Edge PIC18FXXXX
SS
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
to SCK
after SCK edge
80
71
73
or SCK
MSb In
MSb
Characteristic
74
72
PIC18F2420/2520/4420/4520
Input
75, 76
Preliminary
bit 6 - - - - - -1
bit 6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXXX
PIC18LFXXXX
PIC18LFXXXX
PIC18LFXXXX
78
79
1.25 T
1.25 T
1.5 T
79
78
LSb In
LSb
Min
100
100
T
CY
CY
40
40
10
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
77
Max Units Conditions
100
25
45
25
50
25
45
25
50
DS39631A-page 351
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
DD
DD
DD
= 2.0V
= 2.0V
= 2.0V

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