PIC18F4520-I/P Microchip Technology Inc., PIC18F4520-I/P Datasheet - Page 67

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PIC18F4520-I/P

Manufacturer Part Number
PIC18F4520-I/P
Description
40 Pin, 32 KB Flash, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4520-I/P

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
TABLE 5-2:
 2004 Microchip Technology Inc.
TMR0H
TMR0L
T0CON
OSCCON
HLVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
CCPR2H
CCPR2L
CCP2CON
BAUDCON
PWM1CON
ECCP1AS
CVRCON
CMCON
TMR3H
TMR3L
T3CON
Legend:
Note
File Name
1:
2:
3:
4:
5:
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
The SBOREN bit is only available when the BOREN1:BOREN0 configuration bits = 01; otherwise it is disabled and reads as ‘0’. See
Section 4.4 “Brown-out Reset (BOR)”.
These registers and/or bits are not implemented on 28-pin devices and are read as
individual unimplemented bits should be interpreted as ‘-’.
The PLLEN bit is only available in specific oscillator configuration; otherwise it is disabled and reads as
INTOSC Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (MCLRE configuration bit = 0). Otherwise, RE3 reads as
read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes.
When disabled, these bits read as ‘0’.
Timer0 Register, High Byte
Timer0 Register, Low Byte
Timer1 Register, High Byte
Timer1 Register, Low Bytes
Timer2 Register
Timer2 Period Register
SSP Receive Buffer/Transmit Register
SSP Address Register in I
A/D Result Register, High Byte
A/D Result Register, Low Byte
Capture/Compare/PWM Register 1, High Byte
Capture/Compare/PWM Register 1, Low Byte
Capture/Compare/PWM Register 2, High Byte
Capture/Compare/PWM Register 2, Low Byte
Timer3 Register, High Byte
Timer3 Register, Low Byte
VDIRMAG
ECCPASE
TMR0ON
ABDOVF
P1M1
CVREN
PRSEN
C2OUT
IDLEN
WCOL
GCEN
ADFM
RD16
RD16
IPEN
Bit 7
SMP
REGISTER FILE SUMMARY (PIC18F2420/2520/4420/4520) (CONTINUED)
(2)
SBOREN
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
ACKSTAT
ECCPAS2
T3CCP2
P1M0
PDC6
SSPOV
CVROE
T08BIT
T1RUN
C1OUT
IRCF2
RCIDL
Bit 6
CKE
(2)
(2)
(1)
2
C Slave Mode. SSP Baud Rate Reload Register in I
ECCPAS1
T1CKPS1
T3CKPS1
PDC5
SSPEN
ACKDT
VCFG1
ACQT2
DC1B1
DC2B1
IRCF1
IRVST
CVRR
C2INV
CHS3
T0CS
Bit 5
D/A
(2)
PIC18F2420/2520/4420/4520
ECCPAS0
T1CKPS0
T3CKPS0
HLVDEN
PDC4
ACKEN
VCFG0
ACQT1
CVRSS
DC1B0
DC2B0
IRCF0
C1INV
CHS2
SCKP
T0SE
Bit 4
CKP
RI
P
Preliminary
(2)
T1OSCEN
CCP1M3
CCP2M3
PSSAC1
T3CCP1
HLVDL3
PDC3
SSPM3
PCFG3
ACQT0
BRG16
RCEN
OSTS
CHS1
CVR3
Bit 3
PSA
CIS
TO
S
(2)
TMR2ON
T1SYNC
CCP1M2
CCP2M2
PSSAC0
T3SYNC
HLVDL2
PDC2
SSPM2
PCFG2
ADCS2
T0PS2
CHS0
CVR2
IOFS
Bit 2
PEN
CM2
R/W
PD
(2)
2
C Master Mode.
0
PSSBD1
GO/DONE
. Reset values are shown for 40/44-pin devices;
T2CKPS1
TMR1CS
CCP1M1
CCP2M1
TMR3CS
HLVDL1
PDC1
SSPM1
PCFG1
ADCS1
T0PS1
RSEN
CVR1
SCS1
WUE
Bit 1
POR
CM1
UA
(2)
(2)
PSSBD0
SWDTEN
T2CKPS0
TMR1ON
TMR3ON
CCP1M0
CCP2M0
HLVDL0
PDC0
SSPM0
PCFG0
ADCS0
ABDEN
T0PS0
ADON
SCS0
CVR0
Bit 0
BOR
CM0
SEN
BF
0
. See Section 2.6.4 “PLL in
(2)
(2)
0000 0000
xxxx xxxx
1111 1111
0100 q000
0-00 0101
0q-1 11q0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
--00 0qqq
0-00 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
01-0 0-00
0000 0000
0000 0000
0000 0000
0000 0111
xxxx xxxx
xxxx xxxx
0000 0000
POR, BOR
--- ---0
DS39631A-page 65
Value on
0
. This bit is
on page:
50, 169,
50, 162,
50, 163,
51, 139,
50, 125
50, 125
50, 123
50, 245
50, 259
50, 131
50, 131
50, 127
50, 134
50, 134
50, 133
50, 170
50, 173
51, 232
51, 232
51, 223
51, 224
51, 225
51, 140
51, 140
51, 140
51, 140
51, 139
51, 204
51, 156
51, 157
51, 239
51, 233
51, 137
51, 137
51, 135
Details
42, 48,
30, 50
102
170
171
172
147

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