PIC18F4520-I/P Microchip Technology Inc., PIC18F4520-I/P Datasheet - Page 315

• Manufacturer Part Number: PIC18F4520-I/P
• Description: 40 Pin, 32 KB Flash, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4520-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

SUBFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
FSR2
FSR2
Q1
=
=
register ‘f’
SUBFSR f, k
0
f
FSR(f) – k
None
The 6-bit literal ‘k’ is subtracted from
the contents of the FSR specified by
‘f’.
1
1
SUBFSR 2, 23h
Subtract Literal from FSR
Read
1110
Q2
03FFh
03DCh
[ 0, 1, 2 ]
k
63
1001
Process
FSRf
Data
Q3
ffkk
destination
PIC18F2420/2520/4420/4520
Write to
kkkk
Q4
Preliminary
SUBULNK
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Operation
Decode
FSR2
PC
FSR2
PC
Q1
No
Subtract Literal from FSR2 and Return
SUBULNK k
0
FSR2 – k
(TOS)
The 6-bit literal ‘k’ is subtracted from the
contents of the FSR2. A RETURN is then
executed by loading the PC with the TOS.
The instruction takes two cycles to
execute; a NOP is performed during the
second cycle.
This may be thought of as a special case of
the SUBFSR instruction, where f = 3 (binary
‘11’); it operates only on FSR2.
1
2
1110
=
=
=
=
k
register ‘f’
Operation
SUBULNK 23h
Read
63
Q2
No
03FFh
0100h
03DCh
(TOS)
PC
FSR2
1001
Operation
Process
Data
Q3
No
DS39631A-page 313
11kk
destination
Operation
Write to
kkkk
Q4
No