PIC18F4520-I/P Microchip Technology Inc., PIC18F4520-I/P Datasheet - Page 354

• Manufacturer Part Number: PIC18F4520-I/P
• Description: 40 Pin, 32 KB Flash, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4520-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2420/2520/4420/4520
FIGURE 26-15:
TABLE 26-17: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
DS39631A-page 352
70
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1:
Param
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
2:
TssL2scH,
TssL2scL
TscH
TscL
Tb2b
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ SS to SDO Output High-Impedance
TscR
TscF
TscH2doV,
TscL2doV
TssL2doV SDO Data Output Valid after SS
TscH2ssH,
TscL2ssH
Symbol
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
Refer to Figure 26-4 for load conditions.
SS
SCK Input High Time
(Slave mode)
SCK Input Low Time
(Slave mode)
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time
(Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK
Edge
Edge
SS
82
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
to SCK
after SCK Edge
MSb In
MSb
74
71
or SCK
75, 76
Characteristic
72
Input
bit 6 - - - - - -1
bit 6 - - - -1
Preliminary
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
80
LSb In
LSb
1.25 T
1.25 T
1.5 T
Min
100
T
40
40
CY
10
CY
—
—
—
—
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
 2004 Microchip Technology Inc.
77
Max Units Conditions
100
100
25
45
25
50
25
45
25
50
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
DD
DD
DD
DD
= 2.0V
= 2.0V
= 2.0V
= 2.0V