PIC18F4520-I/P Microchip Technology Inc., PIC18F4520-I/P Datasheet - Page 150

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PIC18F4520-I/P

Manufacturer Part Number
PIC18F4520-I/P
Description
40 Pin, 32 KB Flash, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4520-I/P

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
PIC18F2420/2520/4420/4520
In addition to the expanded range of modes available
through the CCP1CON register and ECCP1AS
register, the ECCP module has an additional register
associated with Enhanced PWM operation and
auto-shutdown features. It is:
• PWM1CON (Dead-band delay)
16.1
The enhanced CCP module may have up to four PWM
outputs, depending on the selected operating mode.
These outputs, designated P1A through P1D, are
multiplexed with I/O pins on PORTC and PORTD. The
outputs that are active depend on the CCP operating
mode selected. The pin assignments are summarized
in Table 16-1.
To configure the I/O pins as PWM outputs, the proper
PWM mode must be selected by setting the
P1M1:P1M0
appropriate TRISC and TRISD direction bits for the port
pins must also be set as outputs.
16.1.1
Like the standard CCP modules, the ECCP module can
utilize Timers 1, 2 or 3, depending on the mode
selected. Timer1 and Timer3 are available for modules
in Capture or Compare modes, while Timer2 is avail-
able for modules in PWM mode. Interactions between
the standard and enhanced CCP modules are identical
to those described for standard CCP modules.
Additional details on timer resources are provided in
Section 15.1.1
Resources”.
TABLE 16-1:
DS39631A-page 148
Compatible CCP
Dual PWM
Quad PWM
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP1 in a given mode.
ECCP Mode
ECCP Outputs and Configuration
ECCP MODULES AND TIMER
RESOURCES
and
PIN ASSIGNMENTS FOR VARIOUS ECCP1 MODES
“CCP
CCP1M3:CCP1M0
Configuration
Modules
00xx 11xx
10xx 11xx
x1xx 11xx
CCP1CON
and
bits.
All 40/44-pin devices:
Timer
The
Preliminary
CCP1
RC2
P1A
P1A
16.2
Except for the operation of the Special Event Trigger
discussed below, the Capture and Compare modes of
the ECCP module are identical in operation to that of
CCP2. These are discussed in detail in Section 15.2
“Capture
Mode”. No changes are required when moving
between 28-pin and 40/44-pin devices.
16.2.1
The Special Event Trigger output of ECCP1 resets the
TMR1 or TMR3 register pair, depending on which timer
resource is currently selected. This allows the CCPR1
register to effectively be a 16-bit programmable period
register for Timer1 or Timer3.
16.3
When configured in Single Output mode, the ECCP
module functions identically to the standard CCP
module in PWM mode, as described in Section 15.4
“PWM Mode”. This is also sometimes referred to as
“Compatible CCP” mode, as in Table 16-1.
Note:
RD5/PSP5
RD5
P1B
P1B
Capture and Compare Modes
Standard PWM Mode
SPECIAL EVENT TRIGGER
When setting up single output PWM opera-
tions, users are free to use either of the pro-
cesses described in Section 15.4.4 “Setup
for PWM Operation” or Section 16.4.9
“Setup for PWM Operation”. The latter is
more generic and will work for either single
or multi-output PWM.
Mode”
and
RD6/PSP6
RD6/PSP6
 2004 Microchip Technology Inc.
RD6
P1C
Section 15.3
RD7/PSP7
RD7/PSP7
“Compare
RD7
P1D

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