PIC18F4520-I/P Microchip Technology Inc., PIC18F4520-I/P Datasheet - Page 230

• Manufacturer Part Number: PIC18F4520-I/P
• Description: 40 Pin, 32 KB Flash, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4520-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2420/2520/4420/4520
19.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 19-3. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 k . After the analog input channel is
selected (changed), the channel must be sampled for
at least the minimum acquisition time before starting a
conversion.
EQUATION 19-1:
EQUATION 19-2:
EQUATION 19-3:
DS39631A-page 228
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25 C. Below 25 C, T
T
T
ACQ
C
ACQ
AMP
COFF
C
ACQ
DD
Note:
HOLD
). The source impedance affects the offset voltage
=
=
A/D Acquisition Requirements
SS
=
=
=
=
=
SS
=
=
) impedance varies over the device voltage
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) impedance directly affect the time
AMP
T
0.2 s
(Temp – 25 C)(0.02 s/ C)
(85 C – 25 C)(0.02 s/ C)
1.2 s
-(C
-(25 pF) (1 k + 2 k + 2.5 k ) ln(0.0004883) s
1.05 s
0.2 s + 1 s + 1.2 s
2.4 s
(V
-(C
AMP
+ T
REF
HOLD
HOLD
+ T
C
– (V
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
S
+ T
)(R
C
)(R
) and the internal sampling
+ T
COFF
REF
IC
IC
+ R
COFF
/2048)) • (1 – e
+ R
HOLD
SS
SS
HOLD
+ R
+ R
) must be allowed
S
S
) ln(1/2047) s
. The sampling
) ln(1/2048)
(-T
C
/C
HOLD
Preliminary
(R
IC
+ R
SS
+ R
S
To
Equation 19-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Example 19-3 shows the calculation of the minimum
required acquisition time T
based
assumptions:
C
Rs
Conversion Error
V
Temperature
))
DD
HOLD
)
calculate
on
COFF
the
= 0 ms.
the
=
=
=
=
following
minimum
 2004 Microchip Technology Inc.
25 pF
2.5 k
1/2 LSb
5V
85 C (system max.)
ACQ
Rss = 2 k
. This calculation is
application
acquisition
system
time,