EP2S130F1020I5N Altera, EP2S130F1020I5N Datasheet - Page 113

EP2S130F1020I5N

Manufacturer Part Number
EP2S130F1020I5N
Description
Manufacturer
Altera
Datasheet

Specifications of EP2S130F1020I5N

Family Name
Stratix II
Number Of Logic Blocks/elements
132540
# I/os (max)
742
Frequency (max)
609.76MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
132540
Ram Bits
6747840
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2S130F1020I5N
Manufacturer:
ALTERA
Quantity:
215
Part Number:
EP2S130F1020I5N
Manufacturer:
ALTERA
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EP2S130F1020I5N
Manufacturer:
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Part Number:
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0
Altera Corporation
May 2007
January 2005,
v2.0
October 2004,
v1.2
July 2004, v1.1
February 2004,
v1.0
Table 2–27. Document Revision History (Part 2 of 2)
Document
Date and
Version
Added document to the Stratix II Device Handbook.
Updated the “MultiVolt I/O Interface” and “TriMatrix Memory”
sections.
Updated Tables 2–3, 2–17, and 2–19.
Updated Tables 2–9, 2–16, 2–26, and 2–27.
Updated note to Tables 2–9 and 2–16.
Updated Tables 2–16, 2–17, 2–18, 2–19, and 2–20.
Updated Figures 2–41, 2–42, and 2–57.
Removed 3 from list of SERDES factor J.
Updated “High-Speed Differential I/O with DPA Support”
section.
In “Dedicated Circuitry with DPA Support” section, removed
XSBI and changed RapidIO to Parallel RapidIO.
Changes Made
Stratix II Device Handbook, Volume 1
Summary of Changes
Stratix II Architecture
2–105

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