TXC-03453BROG Transwitch Corporation, TXC-03453BROG Datasheet - Page 10

• Manufacturer Part Number: TXC-03453BROG
• Manufacturer: Transwitch Corporation

Specifications of TXC-03453BROG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

September 2003
TL3M
TXC-03453B
PRELIMINARY TXC-03453B-MB, Ed. 3
BLOCK DIAGRAM DESCRIPTION
A functional block diagram of the TL3M is shown in Figure 2. The portion of the ITU-T SDH multiplexing struc-
ture implemented by each Level 3 Mapper within the TL3M device is shown in Figure 3. Each of the three Level
3 mappers is multiplexed/demultiplexed from a SDH/SONET Telecom Bus interface which is carrying the three
STS-3 STS-1s or STM-1 VC-4 TUG-3s.
In the receive direction the drop side parallel Telecom Bus interface uses a bus signaling rate of 19.44 MHz.
The parallel interface at the drop block consists of byte-wide input data (DD(7-0)), a C1J1 input indication
(DC1J1), an SPE input indication (DSPE), input clock (DCLK), and input parity (DPAR). The C1 (J0) pulse,
which is required, is used in conjunction with an active low SPE indication to determine the start of the SDH/
SONET frame. The J1 pulse (in the DC1J1 signal) and an active high SPE indication determine the starting
location of the VC-4 within the STM-1 format and also the start of each of the STS-1s in the STS-3 format.
There are three J1 pulses required for the STS-3 format, and a single J1 pulse required for the STM-1 VC-4
format. The Drop bus clock (DCLK) is also monitored for a stuck high or low state. The data leads and other
bus leads are calculated for odd parity and compared against the incoming input parity lead (DPAR) to deter-
mine if there is a parity error. Other than a parity error indication, no action is taken by the TL3M. The C1J1
pulse is also monitored for a loss of J1 pulse. An option is provided in which the C1 pulse can be supplied on a
separate lead from the DC1J1 lead (DC1 lead).
The Decode block contains the logic for performing the pointer interpretation and tracking for each of the three
TUG-3s, when the STM-1 VC-4 format is selected. The H1/H2 pointer bytes in each of the TUG-3s are moni-
tored for loss of pointer, AIS, and a New Data Flag (NDF) indication. The pointer state machines are imple-
mented using the algorithms specified in ETSI and ANSI documents. Performance counters are provided for
justification events. The TL3M does not perform pointer tracking for the STS-1 signals, or for the VC-4 formats.
Instead, the J1 indication is used as the start of format indication.
STM-N
Note 2: AU-3/VC-3 is for DS3 only.
Note 1: G.702 tributaries associated with containers C-x are shown. Other signals (e.g., ATM) can also be accommodated.
Same as STS-3
x N
STS-1
AUG
Pointer processing
Multiplexing
Aligning
Mapping
x 1
x 3
AU-4
AU-3
Figure 3. TL3M Multiplexing Structure
VC-4
VC-3
x 3
x 7
ITU-T SDH multiplexing structure
TUG-3
DATA SHEET
- 10 of 96 -
x 1
x 7
One mapper of TL3M device
TUG-2
x 4
x 1
x 3
TU-12
TU-11
VC-4
TU-3
TU-2
VC-12
VC-11
VC-3
VC-2
C-12
C-11
C-4
C-3
C-2
or 34368 kbit/s
44736 kbit/s
(Note 1, 2)
139264 kbit/s
6312 kbit/s
2048 kbit/s
1544 kbit/s
(Note 1)
(Note 1)
(Note 1)
(Note 1)