TXC-03453BROG Transwitch Corporation, TXC-03453BROG Datasheet - Page 81

• Manufacturer Part Number: TXC-03453BROG
• Manufacturer: Transwitch Corporation

Specifications of TXC-03453BROG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

Address
(cont.)
XB2
XB3
XB4
Bit
7-0
Proprietary TranSwitch Corporation Information for use Solely by its Customers
4
3
2
1
0
7
6
5
4
3
TUG3NEW TUG-3 New Alarm: An unlatched TUG-3 new indication occurs when three
RAMLOC
Symbol
J1NEW
ROVFL
TOVFL
ALOJ1
L3AIS
ALOC
SINT
Transmit FIFO Overflow/Underflow: This unlatched alarm indicates that
the transmit FIFO has either underflowed or overflowed. The FIFO automat-
ically resets to a preset value on the occurrence of the alarm.
Transmit Line E3 AIS Detected: For an E3 signal, this unlatched AIS
alarm is detected when four or fewer zeros are detected in 1536 bits, twice
in a row. Recovery occurs when there are five or more zeros detected in
1536 bits two consecutive times.
Please note: DS3 AIS detection is not supported.
RAM Loss Of Clock Detected: The RAM clock input (RAMCI) is monitored
for a stuck high or low state using the internal PLL clock to activate this
unlatched alarm when the input has been stuck for approximately 225 ns.
Recovery occurs within 100 ns of the first RAM clock transition. ACLK (lead
P1), when ABTIM (lead B21) is asserted or DCLK (lead K3), when ABTIM
is unasserted, must be present for this alarm to function.
Add Bus Loss Of Clock: This unlatched alarm is enabled when the Add bus
timing is selected (lead ABTIM is high). An Add bus loss of clock alarm
occurs when the input add clock (ACLK) is stuck high or low for approxi-
mately 225 ns. Recovery occurs within 100 ns of the first bus clock transition.
ACLK (lead P1), when ABTIM (lead B21) is asserted or DCLK (lead K3),
when ABTIM is unasserted, must be present for this alarm to function.
Add Bus Loss of J1: This unlatched alarm is enabled when the Add bus
timing is selected (lead ABTIM is high). An Add bus loss of J1 alarm occurs
when:
Recovery occurs when the J1 pulse is detected in the same location for 8
consecutive frames.
This register contains latched bits that correspond to the unlatched bits in
register XB2H. These latched bits are reset to 0 when they are read.
Software Interrupt: This unlatched software interrupt indication occurs
when one or more bit locations in the interrupt mask locations has been set
to 1, and a corresponding latched alarm becomes active. The SINT state is
exited when the last latched alarm causing the interrupt is cleared
(i.e., when its register is read) or the corresponding bit in the interrupt mask
is turned off.
Reserved
J1 New Alarm: An unlatched indication that a new J1 location, other than
those resulting from pointer movements, has been detected in the VC-4 or
STS-3 STS-1.
consecutive new pointers, or an NDF and a match of the SS bits while the
pointer offset value is in range, have been detected.
Receive FIFO Overflow/Underflow: This unlatched alarm indicates the
pointer leak FIFO has underflowed or overflowed. When this occurs, the
FIFO will automatically reset to a preset position and the FIFO Reset Indi-
cation output lead (DFnE) will pulse high.
- 8 consecutive new J1 positions have been detected or
- J1 is stuck low for 8 consecutive frames or
- J1 is stuck high for 8 consecutive bytes or
- 8 J1 pulses are received in one frame.
DATA SHEET
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Description
PRELIMINARY TXC-03453B-MB, Ed. 3
TXC-03453B
September 2003
TL3M