TXC-03453BROG Transwitch Corporation, TXC-03453BROG Datasheet - Page 85

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TXC-03453BROG

Manufacturer Part Number
TXC-03453BROG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-03453BROG

Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-03453BROGA
Manufacturer:
TRANSWITCH
Quantity:
5
The relationship between a transmitted path overhead byte and the corresponding RAM location is as follows:
Bits in a RAM Location
Bits of Transmitted POH Byte
For example, if a 01 hex (0000 0001) is written into a RAM location, a 01 hex (0000 0001), starting with bit 1 (a 0),
is transmitted.
The O-bits consist of two overhead communication bits per subframe, for nine subframes, in the DS3 format, or
for 3 designated subframes in the E3 format. Please note that the ETSI and ITU standards do not specify an
overhead channel in the E3 mapping format. The selection of the two bits per subframe, either from the O-bit
interface or from RAM, operates in the same way as the path overhead bytes, but the O-bits from the transmit
O-bit port are not written into the designated RAM location.
Where X=1, 2, or 3, which corresponds to the selected channel:
Address
7
1
X00
X3F
X40
X41
to
6
2
Bit
7-0
7-0
7-0
Proprietary TranSwitch Corporation Information for use Solely by its Customers
5
3
4
4
Symbol
Mask
Error
C2
B3
J1
3
5
Transmit Path Trace: The bytes written into these 64 registers provide a
repetitive 64-byte fixed length message for transmission. The bytes written
into these positions are either from the microprocessor or from the external
POH input/output interface. The starting address is arbitrary.
Transmit B3 Error Mask: When control bit TESTB3 (bit 7 in XC7H) is a 0,
the bits in this register that are written with a one represent the columns in
the B3 byte in which errors will be generated. The error is created by
inverting the calculated B3 bit position. For example, if a 01 hex is written
into this register. Bit 8 in the B3 byte will be transmitted inverted. The B3
errors are sent until this register is rewritten with a 00H.
When control bit TESTB3 is a 1, the value written into this register location
is the transmitted B3 byte.
Transmit Path Signal Label (microprocessor-written value): The bits of
the C2 byte that are written into this position indicate the construction of
the AU-3, TUG-3, or SPE (e.g., unequipped).
2
6
1
7
DATA SHEET
0
8
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Description
PRELIMINARY TXC-03453B-MB, Ed. 3
TXC-03453B
September 2003
TL3M

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