TXC-03453BROG Transwitch Corporation, TXC-03453BROG Datasheet - Page 73

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TXC-03453BROG

Manufacturer Part Number
TXC-03453BROG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-03453BROG

Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-03453BROGA
Manufacturer:
TRANSWITCH
Quantity:
5
Address
(cont.)
XC2
XC3
Bit
Proprietary TranSwitch Corporation Information for use Solely by its Customers
0
7
6
5
4
3
2
1
0
Symbol
L3OEN
EXN1
EXK3
EXH4
EXG1
EXC2
EXF3
EXF2
EXJ1
Receive Output Enable: A 0 forces the receive interface clock (RCLKn)
and data signals (RPOSn and RNEGn), and NRZ outputs (RnNRC and
RnNRD) for channel n to a high impedance state. A 1 enables the receive
output leads. This bit works in conjunction with bit L3EN (0C2H, bit 0).
L3EN
Please note: This control bit is forced to 0 on a hardware reset or software
reset.
Transmit External Interface N1 byte: A 1 enables the N1 byte from the
POH input/output interface to be transmitted. A 0 enables the correspond-
ing RAM location to be transmitted.
Transmit External Interface K3 byte: A 1 enables the K3 byte from the
POH input/output interface to be transmitted. A 0 enables the correspond-
ing RAM location to be transmitted.
Transmit External Interface F3 byte: A 1 enables the F3 byte from the
POH input/output interface to be transmitted. A 0 enables the correspond-
ing RAM location to be transmitted.
Transmit External Interface H4 byte: A 1 enables the H4 byte from the
POH input/output interface to be transmitted. A 0 enables the correspond-
ing RAM location to be transmitted.
Transmit External Interface F2 byte: A 1 enables the F2 byte from the
POH input/output interface to be transmitted. A 0 enables the correspond-
ing RAM location to be transmitted.
Transmit External Interface G1 Byte: A 1 enables the G1 byte from the
POH input/output interface to be transmitted. A 0 enables the correspond-
ing RAM location or internal logic/alarms to control the transmitted state of
REI (FEBE), RDI, and the unassigned bits.
Transmit External Interface C2 Byte: A 1 enables the C2 byte from the
POH input/output interface to be transmitted. A 0 enables the correspond-
ing RAM location to be transmitted.
Transmit External Interface J1 Bytes: A 1 enables the J1 bytes from the
POH input/output interface to be transmitted. A 0 enables the correspond-
ing RAM segment (64 locations) to be transmitted.
0
0
1
1
DATA SHEET
L3OEN
- 73 of 96 -
0
1
0
1
All receive channels high-Z
All receive channels high-Z
Per channel high-Z
Receive outputs enabled
Description
PRELIMINARY TXC-03453B-MB, Ed. 3
TXC-03453B
September 2003
TL3M

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