TXC-03453BROG Transwitch Corporation, TXC-03453BROG Datasheet - Page 17

• Manufacturer Part Number: TXC-03453BROG
• Manufacturer: Transwitch Corporation

Specifications of TXC-03453BROG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

DROP BUS INTERFACE
* Note: See the
Symbol
DD(7-0)
DC1J1
DCLK
DSPE
DPAR
DC1
F1, D3, G3, G2,
G1, H1, H3, H2
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Lead No.
“Input, Output and Input/Output Parameters’’
K3
K2
J3
J2
J1
I/O/P
I
I
I
I
I
I
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Type*
DATA SHEET
- 17 of 96 -
Drop Bus Data Byte: 19.44 Mbyte/s byte-wide data that
corresponds to the STM-1 or STS-3 signal from the Drop
bus. Lead F1 is DD7. Data that may be present on the
bus, other than the TUG-3s, or the STS-3 STS-1 SPEs, is
ignored.
Drop Bus Clock: This clock operates at a 19.44 MHz
rate. Drop bus byte-wide data (DD(7-0)), parity (DPAR),
payload indicator (DSPE), and C1/J1 (DC1J1 and DC1)
are clocked in on falling edges of this clock.
This signal will provide timing for the add direction when
the Drop bus timing mode is selected (lead ABTIM is
low).
Drop C1 Pulse: External positive C1 pulse that may be
provided on this lead instead of in the DC1J1 signal. This
signal is internally or-gated with the DC1J1 signal to form
a composite C1J1 signal. If this lead is not used it must
be grounded.
This signal will provide timing for the add direction when
the Drop bus timing mode is selected (lead ABTIM is
low).
Drop Bus C1 and J1 Indicator: The C1 pulse is an active
high, one clock cycle-wide (DCLK) timing pulse that indi-
cates the location of the first C1 (J0) time slot in the STM-
1 or STS-3 frame. If the C1 pulse is not present in this sig-
nal, it must be provided at the DC1 lead. One or three J1
pulses, also one clock cycle wide, identify the starting
location of the J1 byte in the VC-4 format or the starting
locations of the J1 bytes in each of the three STS-1s.
This signal will provide timing for the add direction when
the Drop bus timing mode is selected (lead ABTIM is
low).
Drop Bus SPE Indicator: A signal that is active high
during the STM-1 VC-4 format, and for each of the STS-3
STS-1 SPE periods. It is active low during the STS-3
TOH and STM-1 RSOH/MSOH byte times.
This signal will provide timing for the add direction when
the Drop bus timing mode is selected (lead ABTIM is
low).
Drop Bus Parity Bit: Odd parity input for the data byte,
the DSPE signal, and the composite DC1J1 pulse.
section for Type definitions.
Name/Function
PRELIMINARY TXC-03453B-MB, Ed. 3
TXC-03453B
September 2003
TL3M