TXC-03453BROG Transwitch Corporation, TXC-03453BROG Datasheet - Page 72

• Manufacturer Part Number: TXC-03453BROG
• Manufacturer: Transwitch Corporation

Specifications of TXC-03453BROG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

September 2003
TL3M
TXC-03453B
PRELIMINARY TXC-03453B-MB, Ed. 3
Address
XC2
Bit
7
6
5
4
3
2
1
ALM2AIS
TLAISGN
TPAISGN
TPAIS00
Symbol
ADBEN
External Alarm Enable AIS: A 1 enables an AIS detected in the SDH/
SONET E1 byte (when control bit XALM2AIS = 0) or a high on either the
ISTAn or PAISn leads (when control bit XALM2AIS = 1) to generate DS3 or
E3 line AIS in the receive direction when control bit RAISEN is a 1. See
logic diagram for Address XC5H, bit 2.
Reserved: Must be set to zero when register is written.
Transmit Line AIS: A 1 written into this position generates and transmits a
DS3 or E3 AIS towards the SDH/SONET Add bus, independent of the state
of control bit FLBK (bit 2 in register XC1H). DS3 AIS is defined as a valid M-
frame with proper subframe structure. The data payload is a 1010...
sequence starting with a 1 after each overhead bit. Overhead bits are as fol-
lows: F0=0, F1=1, M0=0, M1=1; C-bits are set to 0; X-bits are set to 1; and
P-bits are set for valid parity. E3 AIS is defined as an all ones pattern.
Transmit TUG-3 Zeros or Path AIS Enable: A 1 enables TUG-3
unequipped channel generation (SPE with zeros and valid pointer), or a
TUG-3 path AIS, towards the SDH/SONET bus, depending on the state of
control bit TPAIS00.
The logic diagrams for sending TUG-3 path AIS and unequipped are
shown below. The + symbol represents an OR function, while & represents
an AND function. Control bit states are given by the = sign.
Transmit TUG-3 SPE with Zeros: When enabled by writing a 1 to control
bit TPAISGN, a 1 written into this location causes the TUG-3 (POH bytes
and payload) to be transmitted with zeros, but with a valid pointer. A 0
causes a TUG-3 path AIS to be transmitted towards the SDH/SONET bus.
Reserved: Must be set to zero when register is written.
Add Bus Enable: A 0 forces the Add bus data (AD(7-0)) and Add Parity
(APAR) leads to a high impedance state, and ADD high. A 1 enables the
Add bus for that channel selection. This bit works in conjunction with bit 1
of Address 0C2H, ADDEN.
ADDEN
Please note: This control bit is forced to 0 on a hardware reset or software
reset.
0
0
1
1
BFOM1=1
TPAISGN=1
TPAIS00=0
TPAISGN=1
TPAIS00=1
BFOM1=1
DATA SHEET
ADBEN
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0
1
0
1
Add bus high-Z
Add bus high-Z
Per channel high-Z
Add bus enabled
&
&
Description
Send TUG-3 Unequipped (zeros)
Send TUG-3 Path AIS
for Channel n
for Channel n