TXC-03453BROG Transwitch Corporation, TXC-03453BROG Datasheet - Page 26

• Manufacturer Part Number: TXC-03453BROG
• Manufacturer: Transwitch Corporation

Specifications of TXC-03453BROG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

September 2003
TL3M
TXC-03453B
PRELIMINARY TXC-03453B-MB, Ed. 3
TRANSMIT AND RECEIVE SYNTHESIZERS
MICROPROCESSOR INTERFACE
Symbol
Symbol
RD/WR
SUBS1
SUBS2
A(9-0)
D(7-0)
GRS1
GRS2
VRS1
SBS1
VRS2
SBS2
SEL
WR
RD
or
AB6, Y7, AA6,
AA13, AB13,
AA12, AB12,
AB11, AA11,
AB5, Y3, Y6,
W13, Y12,
Y11, W10
AA5, AB4
Lead No.
Lead No.
AA1
AB7
AA7
W2
W6
D1
E2
Y2
V3
E1
F3
I/O/P
I/O/P
I/O
I
I
I
I
I
I
I
LVCMOS
LVTTLp Select: A low enables data transfers between the micro-
Analog
Analog
Analog
LVTTL/
LVTTL
LVTTL
LVTTL
Type
Type
8mA
DATA SHEET
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Transmit Synthesizer Bias Components: An external
30.1 k
lead and the SBS1 lead. A 220 pF bypass capacitor is
connected between the SBS1 node and ground, as
shown in the Synthesizer connections diagram (Figure
28). VRS1 should be left unconnected.
Receive Synthesizer Bias Components: An external
30.1 k
lead and the SBS2 lead. A 220 pF bypass capacitor is
connected between the SBS2 node and ground, as
shown in the Synthesizer connections diagram (Figure
28). VRS2 should be left unconnected.
Dedicated Substrate Connections: These leads are
normally connected to ground.
Address Bus: Used by the microprocessor for accessing
a specific memory location in the TL3M for a read/write
cycle. A9 is defined as the most significant bit (lead
AA13).
Data Bus: Bidirectional data lines used for transferring
data between the TL3M and the external microprocessor.
D7 (lead AB6) is defined as the most significant bit.
Write (I mode):
Intel Mode - An active low signal generated by the micro-
processor for writing to the TL3M.
Motorola Mode - Not used. This lead should be tied high.
Read (I mode) or Read/Write (M mode):
Intel Mode - An active low signal generated by the micro-
processor for reading the TL3M memory map.
Motorola Mode - A high signal generated by the micro-
processor for reading the TL3M memory map. A low sig-
nal is used for writing to the TL3M.
processor and the TL3M during a read/write cycle.
1% resistor is connected between the GRS1
1% resistor is connected between the GRS2
Name/Function
Name/Function