TXC-03453BROG Transwitch Corporation, TXC-03453BROG Datasheet - Page 74

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TXC-03453BROG

Manufacturer Part Number
TXC-03453BROG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-03453BROG

Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-03453BROGA
Manufacturer:
TRANSWITCH
Quantity:
5
September 2003
TL3M
TXC-03453B
PRELIMINARY TXC-03453B-MB, Ed. 3
Address
XC4
Bit
7
6
5
RAMRDI
Symbol
EXOO
External O-Bit Select: A 1 selects the two Overhead Communication Bits
(O-bits) from the external interface (lead TnOCD) as the two O-bits trans-
mitted in each of the nine subframes of the DS3 format or TranSwitch des-
ignated reserved bits in each of the three subframes of the E3 format. A 0
enables the two O-bits from the corresponding RAM location to be trans-
mitted (TOBIT2, TOBIT1 at Address X49H).
Reserved: Must be set to zero when register is written.
Remote Defect Indication Enabled: Enable bit for controlling the genera-
tion of Path RDI (bit 5 in G1 byte). When control bits RING and EXG1 are
0, and RAMRDI is a 0, RDI is generated when the following alarms or con-
ditions occur:
When control bit RING is a 1, EXG1 is a 0, and RAMRDI is a 0, the RDI
state is controlled via the Alarm Indication Port.
The microprocessor controls the RDI state when RAMRDI is a 1 and
EXG1 is a 0. Note: writing a 1 to the RAMRDI bit will disable the local
alarms and the Alarm Indication Port RDI in the ring mode from controlling
the state of the transmitted RDI bit.
The logic diagram for sending Path RDI is given below. The + symbol rep-
resents an OR function, while & represents an AND function. Control bit
states are given by the = sign.
- Drop bus loss of J1 (DLOJ1)
- Drop bus loss of clock (DLOC)
- Loss of pointer (LOP) (TUG-3 operation)
- Path AIS detected (PAIS) (TUG-3 operation)
- Received E1 byte has a majority of 1s and control bit XALM2AIS is 0
- Either the ISTAn or PAISn input lead is high and control bit XALM2AIS is
- PSLERR or C2EQ0 alarm, and control bit PSL2AIS is a 1
POH I/O (bit 5 of G1)
EXG1=1
RING=0
PSLERR (Alarm)
C2EQ0 (Alarm)
PSL2AIS=1
LOP (Alarm) (TUG-3)
PAIS (Alarm) (TUG-3)
BFOM1=1
DLOJ1 (Alarm)
DLOC (Alarm)
E1AIS (Alarm)
XALM2AIS=0
ISTAn lead high
PAISn lead high
XALM2AIS=1
AIP I/O RDI Value
RING=1
RAMRDI=0
RAMRDI=1
RAM RDI VALUE
EXG1=0
a 1
DATA SHEET
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&
&
+
+
+
&
&
&
&
&
Description
+
&
+
&
+
&
+
Send Path
RDI for
Channel n

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