UPD75518 NEC, UPD75518 Datasheet - Page 101

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

(b) Switching between MSB and LSB as the first transfer bit
The SO0 pin becomes a CMOS output and outputs the state of the SO0 latch. So the output state of
the SO0 pin can be manipulated by setting the RELT bit and CMDT bit.
However, this manipulation must not be performed during serial transfer.
The output state of the SCK0 pin can be controlled by manipulating the P01 output latch in the output
mode (internal system clock mode). (See Section 4.8.7.)
The three-wire serial I/O mode has a function that can switch between the MSB and LSB as the first
bit of transfer.
Fig. 4-45 shows the configuration of shift register 0 (SIO0) and internal bus. As shown in Fig. 4-45,
read or write operation can be performed by switching between the MSB and LSB.
This switching can be specified using bit 2 of serial operation mode register 0 (CSIM0).
The first bit is switched by changing the order of data bits written to shift register 0 (SIO0). The shift
operation order of SIO0 is always the same.
Accordingly, the first bit must be switched between the MSB and LSB before writing data to the shift
register 0.
MSB first
Internal bus
LSB first
SCK0
SO0
SI0
7
6
1
0
Fig. 4-45 Transfer Bit Switching Circuit
Shift resister 0 (SIO0)
Read/write gate
D
Q
SO0 latch
Read/write gate
PD75518(A)
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