UPD75518 NEC, UPD75518 Datasheet - Page 115

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

(2) Shift register 1 (SIO1)
4.9.4 Serial Interface (Channel 1) Operation
(1) Operation halt mode
Example
SIO1 is an 8-bit register which performs parallel-serial conversion and serial transfer (shift) operation in
phase with the serial clock.
Serial transfer is started by writing data to SIO1. The MSB is used as the first bit of transfer.
In tansmission, data written to SIO1 is output on the serial output (SO1). In reception, data is read from
the serial input (SI1) into SIO1.
Data can be read from or written to SIO1 using an 8-bit manipulation instruction.
When the RESET signal is entered during operation, the value of SIO1 is undefined. When the RESET signal
is entered in the standby mode, the value of SIO1 is preserved.
Shift operation is stopped after 8-bit transmission or reception is completed.
The timing for reading SIO1 and start of serial transfer (writing to SIO1) is as follows:
• When the serial interface operation enable/disable bit (CSIE1) is set to 1. However, the case where CSIE1
• When the serial clock is masked after 8-bit serial transfer
• When SCK1 is high
The operation halt mode is used when serial transfer is not performed, which is set by setting 0 in CSIE1.
This mode reduces power consumption.
Shift register 1 does not perform shift operation in this mode, so the shift register can be used as a normal
8-bit register.
When the RESET signal is entered, the operation halt mode is set. The P82/SO1 pin and P83/SI1 pin
function as input-only port pins. The P81/SCK1 pin can be used as an input port pin by setting serial
operation mode register 1.
is set to 1 after data is written to the shift register 1 is excluded.
To select f
transfer terminates
SEL
MOV XA, #10000010B
MOV CSIM1, XA
MB15
X
/2
4
as the serial clock, and set the serial transfer end flag EOT to 1 each time serial
; or CLR1 MBE
; CSIM1
10000010B
PD75518(A)
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