UPD75518 NEC, UPD75518 Datasheet - Page 134

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

134
5.3 INTERRUPT SEQUENCE
Notes 1. IST1 and IST0: Interrupt status flags (Bits 3 and 2 of PSW. See Table 5-3.)
The following flowchart shows the sequence of an interrupt.
2. Each vector table must store the start address of the interrupt service program and the set values
of the MBE and RBE at the start of an interrupt.
Save contents of PC and PSW in stack memory and set data
corresponding to activated VRQn to PC, RBE, and MBE.
Jump to the start address for processing the interrupt service program.
Change contents of IST0 and IST1 from 00 to 01
or from 01 to 10.
Reset accepted IRQ
See Section 5.5 when those interrupt
sources share vector address.
Corresponding VRQn occurrence
Interrupt (INT
IST1, 0 = 00 or 01
IRQ
IE
high-order
interrupt?
Is VRQn
IME = 1
Note 1
setting
set?
YES
YES
YES
YES
) occurrence
.
NO
NO
NO
NO
Hold until IME
is set.
Hold until IE
If two or more VRQns occur,
select one VRQn according to
Table 5-1.
Selected
VRQn
Note 2
IST1, 0 = 00
in vector table
Note 1
is set.
YES
Remaining
VRQns
Hold until process-
ing being executed
is finished.
NO
PD75518(A)