UPD75518 NEC, UPD75518 Datasheet - Page 124

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

124
4.11 BIT SEQUENTIAL BUFFER: 16 BITS
manipulations to be performed very easily by sequentially changing address and bit specifications. So the
buffer is useful in processing long data bit by bit.
and also allows indirect bit specification using the L register.
decrementing the L register in a program loop, the bit to be manipulated can be sequentially shifted for
continued processing.
continuous 1-bit data input or output operations by combining direct 1-bit, 4-bit, and 8-bit addressing with
pmem.@L addressing. In 8-bit manipulation, the higher eight bits or lower eight bits can be manipulated by
specifying BSB0 or BSB2.
Example
The bit sequential buffer is special data memory for bit manipulations. In particular, the buffer allows bit
This data memory consists of 16 bits, and allows pmem.@L addressing with a bit manipulation instruction
Remark In pmem.@L addressing, bit specification is shifted according to the L register.
Data can also be manipulated using direct addressing. The buffer can be used for applications such as
Address
Bit
Symbol
L register
The 16-bit data of BUFF1 and BUFF2 are output from bit 0 of port 3 in serial mode.
Program example
LOOP0:
LOOP1:
LOOP2:
L = F
3
CLR1
MOV
MOV
MOV
MOV
MOV
SKT
BR
NOP
SET1
BR
CLR1
NOP
NOP
INCS
BR
RET
2
FC3H
BSB3
Fig. 4-63 Format of the Bit Sequential Buffer
MBE
XA, BUFF1
BSB0, XA
XA, BUFF2
BSB2, XA
L, #0
BSB0, @L
LOOP1
PORT3.0
LOOP2
PORT3.0
L
LOOP0
1
L = C L = B
0
3
INCS L
2
FC2H
BSB2
; L
; Set BSB0, 1
; Set BSB2, 3
; Test specified BSB bit
; Dummy (timing adjustment)
; Set bit 0 of port 3
; Clear bit 0 of port 3
; Dummy (timing adjustment)
1
L+1
L = 8 L = 7
0
3
2
FC1H
BSB1
DECS L
In this case, only by incrementing or
1
L = 4 L = 3
0
3
2
FC0H
BSB0
1
L = 0
0
PD75518(A)