UPD75518 NEC, UPD75518 Datasheet - Page 61

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

(3) Clock output mode register (CLOM)
Address
FD0H
The CLOM is a 4-bit register to control clock output.
The CLOM is set with a 4-bit memory manipulation instruction. No read operation is allowed on this
register.
The generation of a RESET signal clears the CLOM to 0, disabling clock output.
Example
Caution
CLOM3
3
Be sure to write a 0 in bit 2 of the CLOM.
CPU clock
SEL MB15
MOV A, #1000B
MOV CLOM, A
2
0
CLOM1
Fig. 4-18 Format of the Clock Output Mode Register
1
is output on the PCL/P22 pin.
; or CLR1 MBE
CLOM0
0
(Frequency when f
Clock output frequency selection bit
(Frequency when f
Note
Clock output enable/disable bit
0
0
1
1
0
0
1
1
0
1
Symbol
CLOM
Output disable
Output enable
0
1
0
1
0
1
0
1
is the CPU clock supply selected by PCC.
f
f
f
f
f
f
X
X
X
X
X
X
/2
/2
/2
/2
/2
/2
output
output
4
6
3
4
6
3
output (375 kHz)
output (93.7 kHz)
output (524 kHz)
output (262 kHz)
output (65.5 kHz)
output (750 kHz)
X
X
Note
Note
= 6.0 MHz)
= 4.19 MHz)
(1.05 MHz, 524 kHz, 262 KHz, 65.5 kHz)
(1.50 MHz, 750 kHz, 375 kHz, 93.7 kHz)
PD75518(A)
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