UPD75518 NEC, UPD75518 Datasheet - Page 53

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

(3) Processor clock control register (PCC)
The PCC is a 4-bit register for selecting a CPU clock with the low-order two bits and for selecting a CPU
operation mode with the high-order two bits. (See Fig. 4-12.)
When bit 3 or bit 2 is set to 1, the standby mode is set. When this is released by the standby release signal,
these bits are automatically cleared to return to the normal operation mode. (See Chapter 6 for detailed
information.)
A 4-bit memory manipulation instruction is used to set the low-order two bits of the PCC. (The high-order
two bits are set to 0.)
Bit 3 and bit 2 are set to 1 using the STOP instruction and HALT instruction, respectively.
The STOP instruction and HALT instruction can be executed regardless of MBE setting.
A CPU clock can be selected only when the main system clock is used for operation. When the subsystem
clock is selected for operation, the low-order two bits of the PCC are invalidated, and f
set. The STOP instruction can be executed only when the main system clock is used for operation.
The generation of a RESET signal clears the PCC to 0.
Examples 1. The machine cycle is set to 0.95 s (at 4.19 MHz).
2. The STOP mode is set. (A STOP instruction or HALT instruction must always be followed
SEL
MOV A, #0011B
MOV PCC, A
by an NOP instruction.)
STOP
NOP
MB15
XT
PD75518(A)
/4 is automatically
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