UPD75518 NEC, UPD75518 Datasheet - Page 110
UPD75518
Manufacturer Part Number
UPD75518
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC
Datasheet
1.UPD75518.pdf
(180 pages)
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110
4.8.6 Transfer Start in Each Mode
transfer data in shift register 0 (SIO0). However, the following two conditions must be satisfied:
• The serial interface operation enable/disable bit (CSIE0) is set to 1.
• The internal serial clock is not operating after 8-bit serial transfer, or SCK0 is high.
flag (IRQCSI0).
Cautions 1. The N-ch transistor needs to be turned off when data is received. So FFH must be written
Example When RAM data specified by the HL register is transferred to SIO0, SIO0 data is loaded into the
In each of the three-wire serial I/O, two-wire serial I/O, and SBI modes, serial transfer is started by writing
Caution Transfer cannot be started by setting CSIE0 to 1 after writing data to the shift register 0.
When eight bits have been transferred, serial transfer automatically terminates setting the interrupt request
[In the two-wire serial I/O mode]
Caution The N-ch transistor needs to be turned off when data is received. So FFH must be written to SIO0
[In the SBI mode]
beforehand.
2. If data is written to SIO0 when the slave is busy, the data is not lost.
accumulator at the same time, and serial transfer is started.
MOV
SEL
XCH
to SIO0 beforehand.
However, when the wake-up function specification bit (WUP) is set to 1, the N-ch transistor
is always off. So FFH need not be written to SIO0 beforehand for reception.
Transfer is started when the busy state is released and input to SB0 (or SB1) goes high.
XA, @HL
MB15
XA, SIO0
; Extracts transmit data from RAM
; or CLR1 MBE
; Exchanges transmit data with receive data and starts transfer
PD75518(A)
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