UPD75518 NEC, UPD75518 Datasheet - Page 22

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

22
2.3 MEMORY-MAPPED I/O
ports to addresses F80H to FFFH in the data memory space as shown in Fig. 2-1. This means that there is no
particular instruction to control peripheral hardware, but all peripheral hardware is controlled using memory
manipulation instructions. (Some mnemonics for hardware control are available to make programs readable.)
• Symbol: Name representing the address of incorporated hardware, which can be coded in the operand
• R/W
• Number of manipulatable bits:
• Bit manipulation addressing:
Bit manipulation
4-bit manipulation
8-bit manipulation
The PD75518(A) employs memory-mapped I/O, which maps peripheral hardware such as timers and I/O
To manipulate peripheral hardware, the addressing modes listed in Table 2-3 can be used.
Fig. 2-5 summarizes the I/O map of the PD75518(A).
The items in Fig. 2-5 have the following meanings:
: Indicates whether the hardware allows read/write operation.
field of an instruction
R/W: Both read and write operations possible
R
W : Write only
Indicates the number of bits that can be processed in hardware manipulation
Bit manipulation addressing applicable in hardware bit manipulation
–
: Bits can be manipulated on an indicated bit (1-, 4-, or 8-bit) basis.
: Particular bits can be manipulated. For these bits, see Remarks.
: Bits cannot be manipulated on an indicated bit (1-, 4-, or 8-bit) basis.
: Read only
Direct addressing mode specifying mem.bit with MBE = 0 or
(MBE = 1, MBS = 15)
Direct addressing mode specifying fmem.bit regardless of MBE
and MBS setting
Indirect addressing mode specifying pmem.@L regardless of
MBE and MBS setting
Direct addressing mode specifying mem with MBE = 0 or (MBE
= 1, MBS = 15)
Register indirect addressing mode specifying @HL with (MBE
= 1, MBS = 15)
Direct addressing mode specifying mem (even address) with
MBE = 0 or (MBE = 1, MBS = 15)
Register indirect addressing mode specifying @HL (with the L
register containing an even number) with (MBE = 1, MBS = 15)
Table 2-3 Addressing Modes Applicable to Peripheral Hardware
Applicable addressing mode
All hardware allowing bit
manipulation
IST0, IST1, MBE, RBE, EOT,
IE
BSBn.
PORTn.
All hardware allowing 4-bit
manipulation
All hardware allowing 8-bit
manipulation addressing
Applicable hardware
, IRQ
, PORTn.
PD75518(A)