UPD75518 NEC, UPD75518 Datasheet - Page 138

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UPD75518

Manufacturer Part Number
UPD75518
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC
Datasheet

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138
6. STANDBY FUNCTION
modes, STOP and HALT.
6.1 SETTING OF STANDBY MODES AND OPERATION STATUSES
Opera-
tion
status
Instruction for setting
System clock at setting
Release signal
To reduce the power consumption when the program is in the wait state, the PD75518(A) has two standby
Clock generator
Basic interval
timer
Serial interface
(Channel 0)
Serial interface
(Channel 1)
Timer/event
counter
Watch timer
A/D converter
Timer/pulse
generator
External interrupt
CPU
Table 6-1 Operation Statuses in the Standby Mode
STOP instruction
This mode can be set only when the main
system clock is used.
Only the main system clock is stopped.
Operation is stopped.
Operation is possible only when external
SCK0 input is selected for the serial clock.
Operation is possible only when external
SCK1 input is selected for the serial clock.
Operation is possible only when TI0 pin
input is selected for the count clock.
Operation is possible only when f
lected for the count clock.
Operation is stopped.
Operation is stopped.
INT0 is disabled. INT1, INT2, and INT4 are enabled.
Operation is stopped.
Interrupt request signals transmitted from hardware, which are enabled by interrupt
enable flags, or RESET input.
STOP mode
XT
is se-
HALT instruction
This mode can be set when either the main
system clock or the subsystem clock is
used.
Only CPU clock
tion continued).
Operation is continued (to set IRQBT at
reference time intervals).
Operation is possible only when the main
system clock operates or external SCK0 is
used.
Operation is possible only when the main
system clock operates.
Operation is possible only when the main
system clock operates.
Operation is possible.
Operation is possible only when the main
system clock operates.
Operation is possible only when the main
system clock operates.
HALT mode
is stopped (with oscilla-
PD75518(A)

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