wm8953 Wolfson Microelectronics plc, wm8953 Datasheet - Page 18

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wm8953

Manufacturer Part Number
wm8953
Description
Low Power Stereo Adc With Pll And Tdm Interface Low Power Stereo Adc With Pll And Tdm Interface
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8953
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AUDIO INTERFACE TIMING – SLAVE MODE
Figure 4 Digital Audio Data Timing – Slave Mode
Note:
BCLK period should always be greater than or equal to MCLK period.
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=3.3V, DGND=AGND=0V, T
otherwise stated.
Audio Data Input Timing Information
BCLK cycle time
BCLK pulse width high
BCLK pulse width low
ADCLRC set-up time to BCLK rising edge
ADCLRC hold time from rising edge
ADCDAT propagation delay from BCLK falling edge
PARAMETER
A
=+25
o
SYMBOL
C, Slave Mode, fs=48kHz, MCLK=256fs, 24-bit data, unless
t
t
t
t
LRSU
t
BCH
t
BCY
BCL
LRH
DD
MIN
50
20
20
20
10
TYP
PD, January 2009, Rev 4.0
MAX
20
Production Data
UNIT
ns
ns
ns
ns
ns
ns
18

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