wm8953 Wolfson Microelectronics plc, wm8953 Datasheet - Page 61

• Manufacturer Part Number: wm8953
• Description: Low Power Stereo Adc With Pll And Tdm Interface Low Power Stereo Adc With Pll And Tdm Interface
• Manufacturer: Wolfson Microelectronics plc

WM8953
Production Data
Figure 41 DSP Mode Audio Interface (mode B, AIF_LRCLK_INV=1, Slave)
PCM operation is supported in DSP interface mode. WM8953 ADC data that is output on the Left
Channel will be read as mono PCM data by the receiving equipment.
AUDIO DATA FORMATS (TDM MODE)
TDM is supported in master and slave mode and is enabled by register bit AIF_ADC_TDM. All audio
interface data formats support time division multiplexing (TDM).
Two time slots are available (Slot 0 and Slot 1), selected by register bit AIFADC_TDM_CHAN.
When TDM is enabled, the ADCDAT pin will be tri-stated immediately before and immediately after
data transmission, to allow another ADC device to drive this signal line for the remainder of the
sample period. Note that it is important that two ADC devices do not attempt to drive the data pin
simultaneously. A short circuit may occur if the transmission time of the two ADC devices overlap
with each other. See “Audio Interface Timing - TDM Mode” for details of the ADCDAT output relative
to BCLK signal. Note that it is possible to ensure a gap exists between transmissions by setting the
transmitted word length to a value higher than the actual length of the data. For example, if 32-bit
word length is selected where only 24-bit data is available, then the WM8953 interface will tri-state
after transmission of the 24-bit data, ensuring a gap after the WM8953’s TDM slot.
When TDM is enabled, BCLK frequency must be high enough to allow data from both time slots to
be transferred. The relative timing of Slot 0 and Slot 1 depends upon the selected data format as
shown in Figure 42 to Figure 46.
Figure 42 TDM in Right-Justified Mode
PD, January 2009, Rev 4.0
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